74VHCT126AFT集成電路（IC）的緩沖器驅(qū)動器接收器收發(fā)器規(guī)格書PDF中文資料

Functional Description

? Quad Bus Buffer, Non-Inverted 3-State Outputs

74VHCT125AFT:QUAD BUS BUFFER

74VHCT126AFT:QUAD BUS BUFFER

General

The 74VHCT125AFT and 74VHCT126AFT are high speed CMOS QUAD BUS BUFFERs fabricated with silicon

gate C2MOS technology.

They achieve the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS

low power dissipation.

The 74VHCT125AFT requires the 3-state control input G to be set high to place the output into the high impedance

state, whereas the 74VHCT126AFT requires the control input G to be set low to place the output into high

impedance.

The input voltage are compatible with TTL output voltage.

This device may be used as a level converter for interfacing 3.3 V to 5 V system.

Input protection and output circuit ensure that 0 to 5.5 V can be applied to the input and output (Note) pins without

regard to the supply voltage. There structure prevents device destruction due to mismatched supply and input/

output voltages such as battery back up, hot board insertion, etc.

Note: Output in off-state

Features

(1) AEC-Q100 (Rev. H) (Note 1)

(2) Wide operating temperature range: Topr = -40 to 125 

(3) High speed: Propagation delay time = 3.8 ns (typ.) at VCC = 5.0 V

(4) Quiescent supply current: ICC = 4.0 μA (max) at Ta = 25 

(5) Compatible with TTL input: VIL = 0.8 V(max)

VIH = 2.0 V(min)

(6) Power down protection is provided on all inputs and outputs.

(7) Balanced propagation delays: tPLH ≈ tPHL

(8) Low noise: VOLP = 0.8 V (max)

(9) Pin and function compatible with the 74 series

(ACT/HCT/AHCT etc.) 125/126 type.