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7LVC374APWDH中文資料飛利浦?jǐn)?shù)據(jù)手冊PDF規(guī)格書

7LVC374APWDH
廠商型號

7LVC374APWDH

功能描述

Octal D-type flip-flop with 5-volt tolerant inputs/outputs; positive edge-trigger 3-State

文件大小

101.27 Kbytes

頁面數(shù)量

12

生產(chǎn)廠商 NXP Semiconductors
企業(yè)簡稱

Philips飛利浦

中文名稱

荷蘭皇家飛利浦官網(wǎng)

原廠標(biāo)識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-1-21 20:00:00

7LVC374APWDH規(guī)格書詳情

DESCRIPTION

The 74LVC374A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

Inputs can be driven from either 3.3V or 5V devices. In 3-State operation, outputs can handle 5V. This feature allows the use of these devices as translators in a mixed 3.3V/5V environment.

The 74LVC374A is an octal D-type flip-flop featuring separate D-type inputs for each flip-flop and 3-State outputs for bus-oriented applications. A clock (CP) and an output enable (OE) input are common to all flip-flops.

The eight flip-flops will store the state of their individual D-inputs that meet the setup and hold times requirements on the LOW-to-HIGH CP transition.

When OE is LOW, the contents of the eight flip-flops is available at the outputs. When OE is HIGH, the outputs go to the high impedance OFF-state. Operation of the OE input does not affect the state of the flip-flops.

The ’374’ is functionally identical to the ’574’, but the ’574’ has a different pin arrangement.

FEATURES

? 5-volt tolerant inputs/outputs, for interfacing with 5-volt logic

? Supply voltage range of 2.7V to 3.6V

? Complies with JEDEC standard no. 8-1A

? CMOS low power consumption

? Direct interface with TTL levels

? High impedance when VCC = 0V

? 8-bit positive edge-triggered register

? Independent register and 3-State buffer operation

產(chǎn)品屬性

  • 型號:

    7LVC374APWDH

  • 制造商:

    PHILIPS

  • 制造商全稱:

    NXP Semiconductors

  • 功能描述:

    Octal D-type flip-flop with 5-volt tolerant inputs/outputs; positive edge-trigger 3-State

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480
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