82575中文資料英特爾數(shù)據(jù)手冊PDF規(guī)格書

Introduction

The Intel? 82575 Gigabit Ethernet Controller is a single, compact component with two fully integrated Gigabit Ethernet Media Access Control (MAC) and physical layer (PHY) ports. The device uses the PCI Express Base Specification, Rev.1.1RD.

The Intel 82575 provides a standard IEEE 802.3 Ethernet interface for 1000BASE-T, 100BASE-TX, and 10BASE-T applications (802.3z, 802.3u, and 802.3ab). Ports also contain a Serializer-Deserializer (SERDES) to support 1000Base-SX/LX (optical fiber) and Gigabit backplane applications. In addition to managing MAC and PHY Ethernet layer functions, the controller manages PCI Express packet traffic across its transaction, link, and physical/logical layers. The SERDES can be used in SGMII mode to connect to external PHY, either on-board or via the SFP connector.

Features

Peak bandwidth 2 GB/s in each direction per PCI Express lane

PCI Express Power Management

High bandwidth density per pin

Uses x4 PCI Express interface on MCH device

64-bit address support for systems using more than 4 GB of physical memory