82S191A中文資料飛利浦?jǐn)?shù)據(jù)手冊(cè)PDF規(guī)格書
82S191A規(guī)格書詳情
DESCRIPTION
The 82S191 and 82S191A are field
programmable, which means that
custom patterns are immediately
available by following the Signetics
Generic I fusing procedure. The 82S191
and 82S191A are supplied with all
outputs at logical Low. Outputs are
programmed to a logic High level at any
specified address by fusing the Ni-Cr
link matrix.
These devices include on-chip decoding
and 3 Chip Enable inputs for ease of
memory expansion. They feature
3-State outputs for optimization of word
expansion in bused organizations.
Ordering information can be found on
the following page.
The 82S191 and 82S191A devices are
also processed to military requirements
for operation over the military
temperature range. For specifications
and ordering information, consult the
Signetics Military Data Handbook.
FEATURES
? Address access time:
– N82S191: 80ns max
– N82S191A: 55ns max
? Power dissipation: 40mW/bit typ
? Input loading: –100mA max
? Three Chip Enable inputs
? On-chip address decoding
? No separate fusing pins
? Unprogrammed outputs are Low level
? Fully TTL compatible
? Outputs: 3-State
APPLICATIONS
? Sequential controllers
? Microprogramming
? Hardwired algorithms
? Control store
? Random logic
? Code conversion
產(chǎn)品屬性
- 型號(hào):
82S191A
- 功能描述:
x8 PROM
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
PHI |
CDIP24 |
94+ |
1 |
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詢價(jià) | ||
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1815+ |
CDIP |
6528 |
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SIG |
589220 |
16余年資質(zhì) 絕對(duì)原盒原盤 更多數(shù)量 |
詢價(jià) | ||||
S |
9125+ |
CDIP |
41 |
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CDIP |
836 |
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詢價(jià) | ||
PHI |
24+ |
DIP24 |
35 |
詢價(jià) | |||
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17+ |
CDIP24 |
9988 |
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詢價(jià) | ||
NXP |
23+ |
CDIP |
5000 |
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詢價(jià) | ||
QPSemi |
三年內(nèi) |
1983 |
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詢價(jià) | |||
QPSEMI |
2021+ |
20 |
100500 |
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詢價(jià) |