843003集成電路（IC）的時鐘發(fā)生器PLL頻率合成器規(guī)格書PDF中文資料

General Description

The 843003 is a 3 differential output LVPECL Synthesizer

designed to generate Ethernet refer- ence clock frequencies.

Using a 31.25MHz or 26.041666MHz, 18pF parallel resonant

crystal, the following frequencies can be generated based on the

settings of 4 fre- quency select pins (DIV_SEL[A1:A0],

DIV_SEL[B1:B0]): 625MHz, 312.5MHz, 156.25MHz, and

125MHz. The 843003 has 2 output banks, Bank A with 1

differential LVPECL output pair and Bank B with 2 differential

LVPECL output pairs.

The two banks have their own dedicated frequency select pins and

can be independently set for the frequencies mentioned above.

The 843003 uses IDT’s 3rd generation low phase noise VCO

technology and can achieve 1ps or lower typical rms phase jitter,

easily meeting Ethernet jitter requirements. The 843003 is

packaged in a small 24-pin TSSOP package.

Features

? Three 3.3V LVPECL outputs on two banks, A Bank with one

LVPECL pair and B Bank with 2 LVPECL output pairs

? Using a 31.25MHz or 26.041666 crystal, the two output banks

can be independently set for 625MHz, 312.5MHz, 156.25MHz

or 125MHz

? Selectable crystal oscillator interface

or LVCMOS/LVTTL single-ended input

? VCO range: 560MHz – 700MHz

? RMS phase jitter @ 156.25MHz (1.875MHz - 20MHz):

0.51ps (typical)

Offset Noise Power

100Hz ................ -96.8 dBc/Hz

1kHz .................. -119.1 dBc/Hz

10kHz ................ -126.4 dBc/Hz

100kHz .............. -127.0 dBc/Hz

? Full 3.3V supply mode

? 0°C to 70°C ambient operating temperature

? Industrial temperature available upon request

? Available in ead-free (RoHS 6) package