8533AG-01LN中文資料IDT數(shù)據(jù)手冊(cè)PDF規(guī)格書

GENERAL DESCRIPTION

The 8533-01 is a low skew, high performance 1-to-4 Differential-to-3.3V LVPECL Fanout Buffer. The 8533-01 has two selectable clock inputs. The CLK, nCLK pair can accept most standard differential input levels. The PCLK, nPCLK pair can accept LVPECL, CML, or SSTL input levels.

FEATURES

? Four differential 3.3V LVPECL outputs

? Selectable differential CLK, nCLK or LVPECL clock inputs

? CLK, nCLK pair can accept the following differential

input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL

? PCLK, nPCLK supports the following input types:

LVPECL, CML, SSTL

? Maximum output frequency: 650MHz

? Translates any single-ended input signal to 3.3V

LVPECL levels with resistor bias on nCLK input

? Output skew: 30ps (maximum)

? Part-to-part skew: 150ps (maximum)

? Propagation delay: 1.4ns (maximum)

? Additive phase jitter, RMS: 0.06ps (typical)

? 3.3V operating supply

? 0°C to 70°C ambient operating temperature

? Lead-Free package

? Industrial temperature information available upon request