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8741004集成電路(IC)的應(yīng)用特定時(shí)鐘/定時(shí)規(guī)格書PDF中文資料

8741004
廠商型號(hào)

8741004

參數(shù)屬性

8741004 封裝/外殼為24-TSSOP(0.173",4.40mm 寬);包裝為卷帶(TR);類別為集成電路(IC)的應(yīng)用特定時(shí)鐘/定時(shí);產(chǎn)品描述:IC PCI EXPRSS/JITT ATTEN 24TSSOP

功能描述

Differential-to-LVDS/0.7V Differential PCI Express? Jitter Attenuator

封裝外殼

24-TSSOP(0.173",4.40mm 寬)

文件大小

606.09 Kbytes

頁面數(shù)量

20

生產(chǎn)廠商 Renesas Technology Corp
企業(yè)簡(jiǎn)稱

RENESAS瑞薩

中文名稱

瑞薩科技有限公司官網(wǎng)

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更新時(shí)間

2025-2-6 17:46:00

8741004規(guī)格書詳情

General Description

The 8741004 is a high performance Differential-to-LVDS/0.7V

Differential Jitter Attenuator designed for use in PCI Express?

systems. In some PCI Express systems, such as those found in

desktop PCs, the PCI Express clocks are generated from a low

bandwidth, high phase noise PLL frequency synthesizer. In these

systems, a jitter attenuator may be required to attenuate high

frequency random and deterministic jitter components from the PLL

synthesizer and from the system board. The 8741004 has 3 PLL

bandwidth modes: 200kHz, 600kHz and 2MHz. The 200kHz mode

will provide maximum jitter attenuation, but with higher PLL tracking

skew and spread spectrum modulation from the motherboard

synthesizer may be attenuated. The 600kHz provides an

intermediate bandwidth that can easily track triangular spread

profiles, while providing good jitter attenuation. The 2MHz bandwidth

provides the best tracking skew and will pass most spread profiles,

but the jitter attenuation will not be as good as the lower bandwidth

modes. Because some 2.5Gb serdes have x20 multipliers while

others have x25 multipliers, the 8741004 can be set for 1:1 mode or

5/4 multiplication mode (i.e. 100MHz input/125MHz output) using the

F_SEL pins.

The 8741004 uses IDT’s 3rd Generation FemtoClock?

PLL technology to achieve the lowest possible phase noise.

The device is packaged in a 24 Lead TSSOP package, making it

ideal for use in space constrained applications such as PCI Express

add-in cards.

Features

? Two LVDS and two 0.7V differential output pairs

Bank A has two LVDS output pairs and

Bank B has two 0.7V differential output pairs

? One differential clock input pair

? CLK, CLK pair can accept the following differential

input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL

? Output frequency range: 98MHz - 160MHz

? Input frequency range: 98MHz - 128MHz

? VCO range: 490MHz - 640MHz

? Cycle-to-cycle jitter: 35ps (maximum)

? Full 3.3V operating supply

? Three bandwidth modes allow the system designer to make jitter

attenuation/tracking skew design trade-offs

? 0°C to 70°C ambient operating temperature

? Available in lead-free (RoHS 6) package

產(chǎn)品屬性

  • 產(chǎn)品編號(hào):

    8741004BGILF

  • 制造商:

    Renesas Electronics America Inc

  • 類別:

    集成電路(IC) > 應(yīng)用特定時(shí)鐘/定時(shí)

  • 系列:

    FemtoClock?

  • 包裝:

    卷帶(TR)

  • PLL:

  • 主要用途:

    PCI Express(PCIe)

  • 輸入:

    HCSL,LVDS,LVHSTL,LVPECL,SSTL

  • 輸出:

    LVDS

  • 比率 - 輸入:

    1:4

  • 差分 - 輸入:

    是/是

  • 頻率 - 最大值:

    160MHz

  • 電壓 - 供電:

    3.135V ~ 3.465V

  • 工作溫度:

    -40°C ~ 85°C

  • 安裝類型:

    表面貼裝型

  • 封裝/外殼:

    24-TSSOP(0.173",4.40mm 寬)

  • 供應(yīng)商器件封裝:

    24-TSSOP

  • 描述:

    IC PCI EXPRSS/JITT ATTEN 24TSSOP

供應(yīng)商 型號(hào) 品牌 批號(hào) 封裝 庫存 備注 價(jià)格
IDT
23+
NA
19960
只做進(jìn)口原裝,終端工廠免費(fèi)送樣
詢價(jià)
IDT
22+
TSSOP24
12245
現(xiàn)貨,原廠原裝假一罰十!
詢價(jià)
IDT
TSSOP24
608900
原包原標(biāo)簽100%進(jìn)口原裝常備現(xiàn)貨!
詢價(jià)
IDT
22+
TSSOP
2985
只做原裝自家現(xiàn)貨供應(yīng)!
詢價(jià)
IDT
22+
24TSSOP
62100
鄭重承諾只做原裝進(jìn)口現(xiàn)貨
詢價(jià)
IDT
24+
TSSOP
860000
明嘉萊只做原裝正品現(xiàn)貨
詢價(jià)
IDT
22+
TSSOP
25000
原裝現(xiàn)貨,價(jià)格優(yōu)惠,假一罰十
詢價(jià)
RENESAS(瑞薩電子)
22+
NA
500000
萬三科技,秉承原裝,購芯無憂
詢價(jià)
IDT
23+
NA/
5611
原裝現(xiàn)貨,當(dāng)天可交貨,原型號(hào)開票
詢價(jià)
Renesas Electronics America In
24+
24-TSSOP(0.173 4.40mm 寬)
9350
獨(dú)立分銷商 公司只做原裝 誠心經(jīng)營(yíng) 免費(fèi)試樣正品保證
詢價(jià)