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89TTM553BL中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

89TTM553BL
廠商型號

89TTM553BL

功能描述

Traffic Manager Co-processor

文件大小

547.38 Kbytes

頁面數(shù)量

31

生產(chǎn)廠商 Renesas Technology Corp
企業(yè)簡稱

RENESAS瑞薩

中文名稱

瑞薩科技有限公司官網(wǎng)

原廠標識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-1-28 11:30:00

89TTM553BL規(guī)格書詳情

89TTM55x Features

 Deterministic performance at 10 Gbps wire-speed (35Mcps)

regardless of the number of flows, traffic size, and patterns.

 Up to 256 megabytes of external memory buffer space

(equivalent to a 210ms buffer at 10 Gbps).

 Support (Rx and Tx) for industry-standard SPI-4 phase 2,

NPF Streaming Interface, and CSIX over LVDS.

 Hierarchical queuing and precise scheduling:

– Traffic management flexibility.

– Support for up to 4K aggregate flow queues (AFQs), 1K port

queues (PQs), 2K arrival reassembly queues (ARQs), and 1K

output queues/channels (OQs) with no external memory

required. Configurable AFQ-to-port assignments.

– Support for up to 1M discrete flows (FLQs), with queuing for

each flow, using external memory. Configurable mapping of

FLQs into aggregate flow queues.

– Two-level FLQ scheduling mode that supports up to 128K or

256K virtual pipe or subscriber queues with up to 8 or 4 CoS

priority queues each.

– Accurate byte-rate shaping at the FLQ, AFQ and port levels.

 Multiple levels of buffer congestion management.

– Hierarchical queue structure and thresholding.

– Congestion indication.

– Dynamic adjustment of thresholds during periods of congestion.

– Packet discard (PD).

– Weighted random early discard (WRED).

– Local congestion indication (CI).

產(chǎn)品屬性

  • 型號:

    89TTM553BL

  • 制造商:

    Integrated Device Technology Inc

  • 功能描述:

    89TTM553BL, ATM TRAFFIC MANAGEMENT 10GBPS 1.8V 960-PIN FCBGA - Trays

  • 功能描述:

    IDT 89TTM553BL, ATM Traffic Management 10Gbps 1.8V 960-Pin FCBGA

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