8P34S2104NBGISLASHW中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

Description

The 8P34S2104 is a high-performance, low-power, differential

dual 1:4 LVDS Output 1.8V/2.5V fanout buffer. The device

supports fail-safe operation and is designed for the fanout of

high-frequency, very low additive phase-noise clock and data

signals. Two independent buffer channels are available. Each

channel has four low-skew outputs. High isolation between

channels minimizes noise coupling. AC characteristics such as

propagation delay are matched between channels.

Guaranteed output-to-output and part-to-part skew characteristics

make the 8P34S2104 ideal for those clock distribution

applications demanding well-defined performance and

repeatability. The device is characterized to operate from a 1.8Vor

a 2.5V power supply. The integrated bias voltage references

enable easy interfacing of AC-coupled signals to the device

inputs.

Features

? Dual 1:4 low skew, low additive jitter LVDS fanout buffers

? Matched AC characteristics across both channels

? High isolation between channels

? Both differential CLKA, nCLKA and CLKB, nCLKB inputs

accept LVDS, LVPECL and single-ended LVCMOS levels

? Maximum input clock frequency: 2GHz

? Output amplitudes: 350mV, 500mV (selectable)

? Output bank skew: 8ps typical

? Output skew: 10ps typical

? Low additive phase jitter, RMS: 45fs typical

(fREF = 156.25MHz, 12kHz–20MHz)

? Full 1.8V and 2.5V supply voltage mode

? Low device current consumption (IDD):

? 135mA typical: 1.8V

? 145mA typical: 2.5V

? Lead-free (RoHS 6), 28-VFQFPN packaging

? -40°C to +85°C ambient operating temperature

? Supports case temperature up to +105°C