8V41N010集成電路（IC）的時鐘發(fā)生器PLL頻率合成器規(guī)格書PDF中文資料

General Description

The 8V41N010 is a PLL-based clock generator specifically designed

for Cavium Networks Octeon II processors. This high performance

device is optimized to generate the processor core reference clock,

the PCI-Express, sRIO, XAUI, SerDes reference clocks and the

clocks for both the Gigabit Ethernet MAC and PHY. The output frequencies are generated from a 25MHz external input source or an

external 25MHz parallel resonant crystal. The industrial temperature

range of the 8V41N010 supports telecommunication, networking,

and storage requirements.

Features

? Eight selectable 100MHz and 156.25MHz clocks for PCI Express,

sRIO and GbE, HCSL interface levels

? One single-ended QF LVCMOS/LVTTL clock output at 50MHz

? Selectable external crystal or differential (single-ended)

input source

? Crystal oscillator interface designed for 25MHz, parallel

resonant crystal

? Differential CLK, nCLK input pair that can accept: LVPECL, LVDS,

LVHSTL, HCSL input levels

? Internal resistor bias on nCLK pin allows the user to drive CLK

input with external single-ended (LVCMOS/ LVTTL) input levels

? Full 3.3V supply mode

? -40°C to 85°C ambient operating temperature

? Lead-free (RoHS 6) packaging