8V49NS0412集成電路（IC）的時(shí)鐘發(fā)生器PLL頻率合成器規(guī)格書(shū)PDF中文資料

Description

The 8V49NS0412 is a clock generator with four output dividers:

three integers, and one that is either integer or fractional. When

used with an external crystal, the 8V49NS0412 generates

high-performance timing for the communications and datacom

markets, especially for applications that demand extremely low

phase noise, such as 10GE, 40GE, 100G, and 400GE.

The 8V49NS0412 provides versatile frequency configurations and

output formats, and is optimized to deliver excellent phase noise

performance. The device delivers an optimum combination of high

clock frequency and low phase noise performance, combined with

high power supply noise rejection.

The 8V49NS0412 supports two types of output levels: LVPECL or

LVDS on eleven of its outputs. In addition, the device has a single

LVCMOS output that can provide a generated clock, or act as a

reference bypass output.

The device can be configured to deliver specific configurations

under pin control only, or additional configurations through an I2

C

serial interface by external processor, or an external I2

C EEPROM

to loading the configuration.

Typical Applications

? 10G/40G/100/400G Ethernet

? Fiber optics

? Gigabit Ethernet, Terabit IP switches/routers

? CPRI Interfaces

Features

? Eleven differential LVPECL and LVDS outputs with

programmable voltage swings

? One LVCMOS output: Input reference can be passed to this

output

? The clock input operates in full differential mode (LVDS,

LVPECL) or single-ended LVCMOS mode

? Driven from a crystal or differential clock input

? 2.4–2.5 GHz PLL frequency range supports Ethernet, SONET,

and CPRI frequency plans

? Four Integer output dividers with a range of output divide ratios

(see Table 5)

? One Fractional output divider can generate any desired output

frequency

? Support of output power-down

? Excellent clock output phase noise:

Offset Output Frequency Single-side Band Phase Noise

100kHz 156.25MHz -143dBc/Hz

? RMS phase noise, 12kHz to 20MHz integration range:

110fs (maximum) at 156.25MHz

? Selected configurations can be controlled via the control input

pins without need for serial port access

? LVCMOS compatible I2

C serial interface gives access to

additional configuration by external processor or loading the

configuration from an external I2

C EEPROM, or in combination

with the control input pins

? Single 3.3V supply voltage

? 64-VFQFPN 9 ? 9 mm, lead-free (RoHS 6) package

? -40°C to +85°C ambient operating temperature