9FGV1006CNNNLTGI8中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

Features

? 1.8V to 3.3V power supplies

? Individual 1.8V, 2.5V or 3.3V VDDO for each output pair

? Supports HCSL, LVDS and LVCMOS I/O standards

? HCSL utilizes Renesas’ LP-HCSL technology for improved

performance, lower power and higher integration:

? Programmable output impedance of 85Ω or 100Ω

? Supports LVPECL and CML logic with easy AC coupling – see

application note AN-891 for alternate terminations

? On-board OTP supports up to 4 complete configurations

? 1 integer, fractional or spread spectrum output frequency

per configuration

? Configuration selected via strapping pins or I2C

? Internal crystal load capacitors

? < 125mW (9FGV1002C – 1.8V with 100MHz LP-HCSL outputs)

? < 100mW (9FGV1006C – 1.8V with 100MHz LP-HCSL outputs)

? 4 programmable I2C addresses: D0, D2, D4, D6

? Easily configured with Renesas Timing Commander? software

or Web Configuration tool

? 4 × 4 mm 24-VFQFPN with integrated crystal option

? 3 × 3 mm 16-LGA with integrated crystal option

? Programmable spread spectrum modulation frequency and

amount

Key Specifications

? 276fs RMS 12kHz–20MHz typical phase jitter at 156.25MHz

? PCIe Gen6 jitter (CC)