9LRS4903中文資料瑞薩數(shù)據(jù)手冊PDF規(guī)格書

Recommended Application:

CK505 clock, 32-pin

Output Features:

? 1 - CPU differential low power push-pull pairs

? 1 - SRC differential low power push-pull pairs

? 1 - Selectable 120MHz or 100MHz CK_SSC_Disp low power

push-pull pair

? 1 - SATA/SRC selectable differential low power push-pull pair

? 1 - DOT differential low power push-pull pair

? 1 - REF, 14.318MHz

Key Specifications:

? CPU outputs cycle-cycle jitter < 85ps

? SRC output cycle-cycle jitter < 125ps

? +/- 100ppm frequency accuracy on all outputs

? SRC are PCIe Gen2 compliant

Features/Benefits:

? Supports spread spectrum modulation, default is 0.5

down spread

? Uses external 14.318MHz crystal, external crystal load

caps are required for frequency tuning

? Does not require external pass transistor for voltage

regulator

? Integrated 33Ω series resistors on differential outputs,

Zo=50Ω