9SBV0802集成電路（IC）的時鐘緩沖器驅動器規(guī)格書PDF中文資料

Description

The 9SBV0802 provides two banks of four 1.05V LVCMOS

outputs. Each bank has its own input. There are three OE

pins. Two OE pins control two outputs each and one OE pin

controls four outputs. One 9SBV0802 allows one PCH to

easily support four CPUs with point to point routing of the

PM signals. Two 9SBV0802 devices allow one PCH to

easily support up to eight CPUs with point-to-point routing

of the PM signals.

Typical Application

Fanout buffer for PM-SYNC and PM_SYNC CLK in Intel

Servers

Output Features

? Eight 1–48MHz 1.05V LVCMOS outputs

Key Specifications

? Additive cycle-to-cycle jitter < 8ps

? Output-to-output skew within a bank < 50ps

? Output-to-output skew between banks < 100ps

Features

? 1.8V power supply, 15mW typical power consumption;

eliminate thermal concerns

? OE pins; support 1, 2, 3 or 4 socket systems

? 1.05V LVCMOS inputs with VREF pin; input thresholds

matched to chipset power supply

? Space saving 4 × 4 mm 20-VFQFPN; minimal board

space