A34C04J8R-Z中文資料創(chuàng)瑞科技數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

DESCRIPTION

The A34C04 is a 512-byte EEPROM device designed to operate the SMBus bus in the 1.7V - 3.6V voltage range, with a maximum of 1 MHz.

The A34C04 includes a 4-Kbit serial EEPROM organized as two banks of 256 bytes each, or 512 bytes of total memory. Each bank is composed of two 128-byte blocks. The device is able to selectively lock the data in any or all of the four 128-byte blocks. Designed specifically for use in DRAM DIMMs (Dual Inline Memory Modules) with Serial Presence Detect, all the information concerning the DRAM module configuration (such as its access speed, its size, its organization) can be kept write-protected in one or more memory blocks.

Individually locking a 128-byte block may be accomplished using a software write protection mechanism in conjunction with a high input voltage VHV on input A0. By sending the device a specific SMBus sequence, each block may be protected from writes until the write protection is electrically reversed using a separate SMBus sequence which also requires VHV on input A0. The write protection for all four blocks is cleared simultaneously

The A34C04 is available in DFN8 package.

FEATURES

? 512 byte Serial Presence Detect EEPROM

compatible with JEDEC EE1004 specification

? Compatib le with SMBus serial interface:

-

up to 1 MHz transfer r ate

? M emory array:

-

4 K bit organized as two banks of 256 bytes

each

-

Each page is composed of two 128 byte blocks

? Software data protection for each 128 byte

block

? Hardware write protection

? Write:

-

Byte Write within 3 ms

-

16 bytes Page Write within 3 ms

? Schmitt Trigger, Filtered Inputs fo r Noise

Suppression

? Single supply voltage:

-

1.7 V to 3.6 V

? High reliability

-

Endurance: 1 Million Write Cycles

-

Data Retention: 100 Years

? Enhanced ESD/latch up protection

-

HBM 6000V

? Available in DFN8 p ackage