A3P1000-PQ144M中文資料Actel數(shù)據(jù)手冊PDF規(guī)格書

Features and Benefits

Military Temperature Tested and Qualified

? Each Device Tested from –55°C to 125°C

Firm-Error Immune

? Not Susceptible to Neutron-Induced Configuration Loss

Low Power

? Dramatic Reduction in Dynamic and Static Power

? 1.2 V to 1.5 V Core and I/O Voltage Support for Low Power?

? Low Power Consumption in Flash*Freeze Mode Allows for

Instantaneous Entry To / Exit From Low-Power Flash*Freeze

Mode?

? Supports Single-Voltage System Operation

? Low-Impedance Switches

High Capacity

? 600 k to 3 M System Gates

? Up to 504 kbits of True Dual-Port SRAM

? Up to 620 User I/Os

Reprogrammable Flash Technology

? 130-nm, 7-Layer Metal (6 Copper), Flash-Based CMOS Process

? Live-at-Power-Up (LAPU) Level 0 Support

? Single-Chip Solution

? Retains Programmed Design when Powered Off

High Performance

? 350 MHz (1.5 V systems) and 250 MHz (1.2 V systems) System

Performance

? 3.3 V, 66 MHz, 66-Bit PCI (1.5 V systems) and 66 MHz, 32-Bit

PCI (1.2 V systems)

In-System Programming (ISP) and Security

? Secure ISP Using On-Chip 128-Bit Advanced Encryption

Standard (AES) Decryption via JTAG (IEEE 1532–compliant)

? FlashLock? to Secure FPGA Contents

High-Performance Routing Hierarchy

? Segmented, Hierarchical Routing and Clock Structure

? High-Performance, Low-Skew Global Network

? Architecture Supports Ultra-High Utilization