首頁>A3P600-1FG144>規(guī)格書詳情
A3P600-1FG144集成電路(IC)的FPGA(現場可編程門陣列)規(guī)格書PDF中文資料
相關芯片規(guī)格書
更多A3P600-1FG144規(guī)格書詳情
General Description
ProASIC3, the third-generation family of Actel flash FPGAs, offers performance, density, and features beyond those of the ProASICPLUS? family. Nonvolatile flash technology gives ProASIC3 devices the advantage of being a secure, low-power, single-chip solution that is live at power-up (LAPU). ProASIC3 is reprogrammable and offers time-to-market benefits at an ASIC-level unit cost. These features enable designers to create high-density systems using existing ASIC or FPGA design flows and tools.
Features and Benefits
High Capacity
? 15 k to 1 M System Gates
? Up to 144 kbits of True Dual-Port SRAM
? Up to 300 User I/Os
Reprogrammable Flash Technology
? 130-nm, 7-Layer Metal (6 Copper), Flash-Based CMOS Process
? Live at Power-Up (LAPU) Level 0 Support
? Single-Chip Solution
? Retains Programmed Design when Powered Off
High Performance
? 350 MHz System Performance
? 3.3 V, 66 MHz 64-Bit PCI?
In-System Programming (ISP) and Security
? Secure ISP Using On-Chip 128-Bit Advanced Encryption Standard (AES) Decryption (except ARM-enabled ProASIC?3 devices) via JTAG (IEEE 1532–compliant)?
? FlashLock? to Secure FPGA Contents
Low Power
? Core Voltage for Low Power
? Support for 1.5 V-Only Systems
? Low-Impedance Flash Switches
High-Performance Routing Hierarchy
? Segmented, Hierarchical Routing and Clock Structure
Advanced I/O
? 700 Mbps DDR, LVDS-Capable I/Os (A3P250 and above)
? 1.5 V, 1.8 V, 2.5 V, and 3.3 V Mixed-Voltage Operation
? Bank-Selectable I/O Voltages—up to 4 Banks per Chip
? Single-Ended I/O Standards: LVTTL, LVCMOS 3.3 V / 2.5 V / 1.8 V / 1.5 V, 3.3 V PCI / 3.3 V PCI-X? and LVCMOS 2.5 V / 5.0 V Input
? Differential I/O Standards: LVPECL, LVDS, B-LVDS, and M-LVDS (A3P250 and above)
? I/O Registers on Input, Output, and Enable Paths
? Hot-Swappable and Cold Sparing I/Os?
? Programmable Output Slew Rate? and Drive Strength
? Weak Pull-Up/-Down
? IEEE 1149.1 (JTAG) Boundary Scan Test
? Pin-Compatible Packages across the ProASIC3 Family
Clock Conditioning Circuit (CCC) and PLL?
? Six CCC Blocks, One with an Integrated PLL
? Configurable Phase-Shift, Multiply/Divide, Delay Capabilities and External Feedback
? Wide Input Frequency Range (1.5 MHz to 350 MHz)
Embedded Memory?
? 1 kbit of FlashROM User Nonvolatile Memory
? SRAMs and FIFOs with Variable-Aspect-Ratio 4,608-Bit RAM Blocks (×1, ×2, ×4, ×9, and ×18 organizations)?
? True Dual-Port SRAM (except ×18)
ARM Processor Support in ProASIC3 FPGAs
? M1 and M7 ProASIC3 Devices—Cortex-M1 and CoreMP7 Soft Processor Available with or without Debug
產品屬性
- 產品編號:
A3P600-1FG144
- 制造商:
Microchip Technology
- 類別:
集成電路(IC) > FPGA(現場可編程門陣列)
- 系列:
ProASIC3
- 包裝:
托盤
- 電壓 - 供電:
1.425V ~ 1.575V
- 安裝類型:
表面貼裝型
- 工作溫度:
0°C ~ 85°C(TJ)
- 封裝/外殼:
144-LBGA
- 供應商器件封裝:
144-FPBGA(13x13)
- 描述:
IC FPGA 97 I/O 144FBGA
供應商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
Microchip Technology |
環(huán)保ROHS+ |
144-LBGA |
12861 |
FPGA熱賣原裝正品 |
詢價 | ||
24+ |
N/A |
64000 |
一級代理-主營優(yōu)勢-實惠價格-不悔選擇 |
詢價 | |||
Microsemi Corporation |
24+ |
144-FPBGA(13x13) |
65200 |
一級代理/放心采購 |
詢價 | ||
Microsemi(美高森美) |
23+ |
FPBGA-144 |
1019 |
深耕行業(yè)12年,可提供技術支持。 |
詢價 | ||
ACTEL/愛特 |
23+ |
BGA |
5000 |
原廠授權代理,海外優(yōu)勢訂貨渠道??商峁┐罅繋齑?詳 |
詢價 | ||
Microsemi SoC |
23+ |
144-LBGA |
11200 |
主營:汽車電子,停產物料,軍工IC |
詢價 | ||
MICROSEMI |
638 |
原裝正品 |
詢價 | ||||
MICROCHIP/微芯 |
23+ |
144-LBGA |
1930 |
只做原裝,主打品牌QQ詢價有詢必回 |
詢價 | ||
Microsemi Corporation |
21+ |
400-LFBGA |
3860 |
進口原裝!長期供應!絕對優(yōu)勢價格(誠信經營 |
詢價 | ||
Microsemi Corporation |
21+ |
144FPBGA |
13880 |
公司只售原裝,支持實單 |
詢價 |