General Description

Microsemis 40MX and 42MX families offer a cost-effective design solution at 5V. The MX devices are single-chip solutions and provide high performance while shortening the system design and development cycle. MX devices can integrate and consolidate logic implemented in multiple PALs, CPLDs, and FPGAs. Example applications include high-speed controllers and address decoding, peripheral bus interfaces, DSP, and co-processor functions.

Features

High Capacity

? Single-Chip ASIC Alternative

? 3,000 to 54,000 System Gates

? Up to 2.5 kbits Configurable Dual-Port SRAM

? Fast Wide-Decode Circuitry

? Up to 202 User-Programmable I/O Pins

High Performance

? 5.6 ns Clock-to-Out

? 250 MHz Performance

? 5 ns Dual-Port SRAM Access

? 100 MHz FIFOs

? 7.5 ns 35-Bit Address Decode

HiRel Features

? Commercial, Industrial, Automotive, and Military Temperature Plastic Packages

? Commercial, Military Temperature, and MIL-STD-883 Ceramic Packages

? QML Certification

? Ceramic Devices Available to DSCC SMD

Ease of Integration

? Mixed-Voltage Operation (5.0V or 3.3V for core and I/Os), with PCI-Compliant I/Os

? Up to 100 Resource Utilization and 100 Pin Locking

? Deterministic, User-Controllable Timing

? Unique In-System Diagnostic and Verification Capability with Silicon Explorer II

? Low Power Consumption

? IEEE Standard 1149.1 (JTAG)Boundary Scan Testing

A42MX36屬于集成電路（IC） > FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列）。美高森美公司制造生產(chǎn)的A42MX36FPGA（現(xiàn)場(chǎng)可編程門(mén)陣列）FPGA 是用于執(zhí)行邏輯運(yùn)算和信息處理的用戶可配置集成電路產(chǎn)品，通常具有非常高級(jí)別的集成功能。這些器件通常用于代替通用微處理器，其中已知運(yùn)算將以極高的速度執(zhí)行，例如用于接收和處理來(lái)自高速數(shù)據(jù)轉(zhuǎn)換器的信息。它們通常需要外部存儲(chǔ)設(shè)備來(lái)存儲(chǔ)用戶所需的配置，并在啟動(dòng)時(shí)重新加載這些配置。