A6810SA集成電路(IC)的配電開關(guān)負載驅(qū)動器規(guī)格書PDF中文資料
廠商型號 |
A6810SA |
參數(shù)屬性 | A6810SA 封裝/外殼為18-DIP(0.300",7.62mm);包裝為卷帶(TR);類別為集成電路(IC)的配電開關(guān)負載驅(qū)動器;產(chǎn)品描述:IC PWR DRVR BIPOLAR 1:10 18DIP |
功能描述 | DABiC-IV, 10-BIT SERIAL-INPUT, LATCHED SOURCE DRIVERS |
封裝外殼 | 18-DIP(0.300",7.62mm) |
文件大小 |
150.16 Kbytes |
頁面數(shù)量 |
8 頁 |
生產(chǎn)廠商 | Allegro MicroSystems |
企業(yè)簡稱 |
ALLEGRO |
中文名稱 | Allegro MicroSystems官網(wǎng) |
原廠標(biāo)識 | |
數(shù)據(jù)手冊 | |
更新時間 | 2025-1-30 14:10:00 |
A6810SA規(guī)格書詳情
The A6809– and A6810– devices combine 10-bit CMOS shift registers, accompanying data latches and control circuitry with bipolar sourcing outputs and pnp active pull downs. Designed primarily to drive vacuum-fluorescent displays, the 60 V and -40 mA output ratings also allow these devices to be used in many other peripheral power driver applications. The A6809– and A6810– feature an increased data input rate (compared with the older UCN/UCQ5810-F) and a controlled output slew rate. The A6809xLW and A6810xLW are identical except for pinout.
The CMOS shift register and latches allow direct interfacing with microprocessor-based systems. With a 3.3 V or 5 V logic supply, typical serial-data input rates are up to 33 MHz.
A CMOS serial data output permits cascade connections in applications requiring additional drive lines. Similar devices are avail-able as the A6811– (12 bits), A6812– (20 bits), and A6818– (32 bits). The A6809– and A6810– output source drivers are npn Darling tons, capable of sourcing up to 40 mA. The controlled output slew rate reduces electromagnetic noise, which is an important consideration in systems that include telecommunications and/or microprocessors and to meet government emissions regulations. For inter-digit blanking, all output drivers can be disabled and all sink drivers turned on with a BLANKING input high. The pnp active pull-downs will sink at least 2.5 mA.
All devices are available in two temperature ranges for optimum performance in commercial (suffix S-) or industrial (suffix E-) applications. The A6810– is provided in three package styles for through-hole DIP (suffix -A), surface-mount SOIC (suffix -LW), or minimum-area surface-mount PLCC (suffix -EP). The A6809– is provided in the SOIC (suffix -LW) only. Copper lead frames, low logic-power dissipation, and low output-saturation voltages allow all devices to source 25 mA from all outputs continuously over the maximum operating temperature range.
FEATURES
■ Controlled Output Slew Rate
■ High-Speed Data Storage
■ 60 V Minimum Output Breakdown
■ High Data Input Rate
■ PNP Active Pull-Downs
■ Low Output-Saturation Voltages
■ Low-Power CMOS Logic and Latches
■ Improved Replacements
for TL4810–, UCN5810–, and UCQ5810–
產(chǎn)品屬性
更多- 產(chǎn)品編號:
A6810SA
- 制造商:
Allegro MicroSystems
- 類別:
集成電路(IC) > 配電開關(guān),負載驅(qū)動器
- 包裝:
卷帶(TR)
- 開關(guān)類型:
閂鎖驅(qū)動器
- 輸出數(shù):
10
- 比率 - 輸入:
1:10
- 輸出配置:
高端
- 輸出類型:
雙極性
- 接口:
并聯(lián),串行
- 電壓 - 負載:
60V(最大)
- 電壓 - 供電 (Vcc/Vdd):
3V ~ 5.5V
- 電流 - 輸出(最大值):
40mA
- 輸入類型:
非反相
- 工作溫度:
-20°C ~ 85°C(TA)
- 安裝類型:
通孔
- 供應(yīng)商器件封裝:
18-DIP
- 封裝/外殼:
18-DIP(0.300",7.62mm)
- 描述:
IC PWR DRVR BIPOLAR 1
供應(yīng)商 | 型號 | 品牌 | 批號 | 封裝 | 庫存 | 備注 | 價格 |
---|---|---|---|---|---|---|---|
ALLEGRO |
22+ |
NA |
6000 |
原廠原裝現(xiàn)貨 |
詢價 | ||
ALL |
22+ |
DIP-18 |
8200 |
原裝現(xiàn)貨庫存.價格優(yōu)勢!! |
詢價 | ||
Allegro |
23+ |
18-DIP |
65600 |
詢價 | |||
ALLEGRO |
22+ |
DIP18 |
8000 |
原裝正品支持實單 |
詢價 | ||
ALLEGRO |
24+ |
DIP |
35210 |
原裝現(xiàn)貨/放心購買 |
詢價 | ||
ALLEGRO |
02+ |
DIP |
56 |
一級代理,專注軍工、汽車、醫(yī)療、工業(yè)、新能源、電力 |
詢價 | ||
ALLEGRO/雅麗高 |
21+ |
DIP-18 |
120000 |
長期代理優(yōu)勢供應(yīng) |
詢價 | ||
ALLEGRO |
21+ |
DIP |
97 |
原裝現(xiàn)貨假一賠十 |
詢價 | ||
ALLEGRO |
24+ |
DIP |
4000 |
原裝原廠代理 可免費送樣品 |
詢價 | ||
ALLEGRO |
2339+ |
DIP |
5650 |
公司原廠原裝現(xiàn)貨假一罰十!特價出售!強勢庫存! |
詢價 |