ACH16373DL中文資料飛利浦數據手冊PDF規(guī)格書

DESCRIPTION

The 74ALVCH16373 is a 16-bit D-type transparent latch featuring separate D-type inputs for each latch and 3-State outputs for bus oriented applications. Incorporates bus hold data inputs which eliminate the need for external pull-up or pull-down resistors to hold unused inputs. One latch enable (LE) input and one output enable (OE) are provided per 8-bit section.

The 74ALVCH16373 consists of 2 sections of eight D-type transparent latches with 3-State true outputs. When LE is HIGH, data at the Dn inputs enter the latches. In this condition the latches are transparent, i.e., a latch output will change each time its corresponding D-input changes.

When LE is LOW the latches store the information that was present at the D-inputs a set-up time preceding the HIGH-to-LOW transition of LE. When OE is LOW, the contents of the eight latches are available at the outputs. When OE is HIGH, the outputs go to the high impedance OFF-state. Operation of the OE input does not affect the state of the latches.

FEATURES

? Wide supply voltage range of 1.2V to 3.6V

? Complies with JEDEC standard no. 8-1A

? CMOS low power consumption

? MULTIBYTETM flow-through standard pin-out architecture

? Low inductance multiple VCC and ground pins for minimum noise

and ground bounce

? Direct interface with TTL levels

? All data inputs have bus hold

? Output drive capability 50? transmission lines @ 85°C

? Current drive ±24 mA at 3.0 V