AD14060集成電路（IC）的DSP（數(shù)字信號處理器）規(guī)格書PDF中文資料

AD14060屬于集成電路（IC）的DSP（數(shù)字信號處理器）。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的AD14060DSP（數(shù)字信號處理器）數(shù)字信號處理器是類似于微處理器或微控制器的器件，但區(qū)別在于其內(nèi)部架構(gòu)經(jīng)修改，適用于對連續(xù)數(shù)據(jù)流連續(xù)執(zhí)行以乘法和加法運算為主的算法，而不是以條件邏輯或大量并發(fā)進程為主的算法。該器件通常用于諸如音頻或視頻信號處理等應(yīng)用。

GENERAL DESCRIPTION

The AD14060/AD14060L Quad-SHARC is the first in a family of high performance DSP multiprocessor modules. The core of the multiprocessor is the ADSP-21060 DSP microcomputer.

PERFORMANCE FEATURES

ADSP-21060 Core Processor (. . . x4)

480 MFLOPS Peak, 320 MFLOPS Sustained

25 ns Instruction Rate, Single-Cycle

Instruction Execution–Each of Four Processors

16 Mbit Shared SRAM (Internal to SHARCs)

4 Gigawords Addressable Off-Module Memory

Twelve 40 Mbyte/s Link Ports (Three per SHARC)

Four 40 Mbit/s Independent Serial Ports (One from

Each SHARC)

One 40 Mbit/s Common Serial Port

5 V and 3.3 V Operation

32-Bit Single Precision and 40-Bit Extended

Precision IEEE Floating Point Data Formats, or

32-Bit Fixed Point Data Format

IEEE JTAG Standard 1149.1 Test Access Port and

On-Chip Emulation

PACKAGING FEATURES

308-Lead Ceramic Quad Flatpack (CQFP)

2.05 (52 mm) Body Size

Cavity Up or Down, Configurable

Low Profile, 0.160 Height

Hermetic

25 Mil (0.65 mm) Lead Pitch

29 Grams (typical)

θJC = 0.368°C/W