AD1836集成電路（IC）的編解碼器規(guī)格書PDF中文資料

AD1836屬于集成電路（IC）的編解碼器。由亞德諾半導體技術有限公司制造生產(chǎn)的AD1836編解碼器編解碼器是用于通過壓縮和解壓縮來轉換數(shù)據(jù)的半導體器件。數(shù)據(jù)壓縮可提高傳輸速度并減少存儲空間。某些編解碼器提供高達 32 位的分辨率，并且分別提供多達 6 個或 8 個模數(shù)轉換器和數(shù)模轉換器。除三角積分調制外，還有 I2C、I2S、SPI、串行、HDA、S/DIF、PCM、USB、AC'97 和 SLIMbus 數(shù)據(jù)接口。

GENERAL DESCRIPTION

The AD1836 is a high-performance, single-chip codec providing three stereo DACs and two stereo ADCs using ADI’s patented multibit sigma-delta architecture. An SPI port is included, allowing a microcontroller to adjust volume and many other parameters. The AD1836 operates from a 5 V supply, with provision for a separate output supply to interface with low-voltage external circuitry. The AD1836 is available in a 52-lead MQFP (PQFP) package.

FEATURES

5 V Multichannel Audio System

Accepts 16-/18-/20-/24-Bit Data

Supports 24 Bits and 96 kHz Sample Rate

Multibit Sigma-Delta Modulators with Data Directed

Scrambling

Data-Directed Scrambling ADCs and DACs—Least

Sensitive to Jitter

Differential Output for Optimum Performance

ADCs: –92 dB THD + N, 105 dB SNR and Dynamic Range

DACs: –95 dB THD + N, 108 dB SNR and Dynamic Range

On-Chip Volume Control with “Autoramp” Function

Programmable Gain Amplifier for ADC Input

Hardware and Software Controllable Clickless Mute

Digital De-Emphasis Processing

Supports 256 x fS, 512 x fS, or 768 x fS Master Clock

Power-Down Mode Plus Soft Power-Down Mode

Flexible Serial Data Port with Right-Justified, Left Justified, I2S-Compatible and DSP Serial Port Modes

TDM Interface Mode Supports 8 In/8 Out Using a

Single SHARC? SPORT

52-Lead MQFP (PQFP) Plastic Package

APPLICATIONS

Home Theatre Systems

Automotive Audio Systems

DVD

Set-Top Boxes

Digital Audio Effects Processors