AD5312BRM集成電路（IC）的數(shù)模轉換器（DAC）規(guī)格書PDF中文資料

AD5312BRM屬于集成電路（IC）的數(shù)模轉換器（DAC）。由亞德諾半導體技術有限公司制造生產的AD5312BRM數(shù)模轉換器（DAC）數(shù)模轉換器（DAC、D/A、D2A 或 D 轉 A）可將數(shù)字信號轉換為緩沖或無緩沖的模擬電壓或電流。DAC 架構是否適合特定應用，要取決于分辨率和采樣頻率。DAC 通常用于音樂播放器，將數(shù)字數(shù)據流轉換為模擬音頻流。它們還用于電視和手機，將數(shù)字視頻數(shù)據轉換為模擬視頻信號，再連接到屏幕驅動器，以顯示單色或彩色圖像。

GENERAL DESCRIPTION

The AD5302/AD5312/AD5322 are dual 8-, 10-, and 12-bit buffered voltage output DACs in a 10-lead MSOP that operate from a single 2.5 V to 5.5 V supply, consuming 230 μA at 3 V. Their on-chip output amplifiers allow the outputs to swing rail to-rail with a slew rate of 0.7 V/μs. The AD5302/AD5312/AD5322 utilize a versatile 3-wire serial interface that operates at clock rates up to 30 MHz and is compatible with standard SPI?, QSPI?, MICROWIRE?, and DSP interface standards.

FEATURES

AD5302: Two 8-bit buffered DACs in 1 package

A version: ±1 LSB INL, B version: ±0.5 LSB INL

AD5312: Two 10-bit buffered DACs in 1 package

A version: ±4 LSB INL, B version: ±2 LSB INL

AD5322: Two 12-bit buffered DACs in 1 package

A version: ±16 LSB INL, B version: ±8 LSB INL

10-lead MSOP

Micropower operation: 300 μA @ 5 V (including

reference current)

Power-down to 200 nA @ 5 V, 50 nA @ 3 V

2.5 V to 5.5 V power supply

Double-buffered input logic

Guaranteed monotonic by design over all codes

Buffered/Unbuffered reference input options

0 V to VREF output voltage

Power-on-reset to 0 V

Simultaneous update of DAC outputs via LDAC

Low power serial interface with Schmitt-triggered inputs

On-chip rail-to-rail output buffer amplifiers

Qualified for automotive applications

APPLICATIONS

Portable battery-powered instruments

Digital gain and offset adjustment

Programmable voltage and current sources

Programmable attenuators