AD5321集成電路（IC）的數(shù)模轉(zhuǎn)換器（DAC）規(guī)格書(shū)PDF中文資料

AD5321屬于集成電路（IC）的數(shù)模轉(zhuǎn)換器（DAC）。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的AD5321數(shù)模轉(zhuǎn)換器（DAC）數(shù)模轉(zhuǎn)換器（DAC、D/A、D2A 或 D 轉(zhuǎn) A）可將數(shù)字信號(hào)轉(zhuǎn)換為緩沖或無(wú)緩沖的模擬電壓或電流。DAC 架構(gòu)是否適合特定應(yīng)用，要取決于分辨率和采樣頻率。DAC 通常用于音樂(lè)播放器，將數(shù)字?jǐn)?shù)據(jù)流轉(zhuǎn)換為模擬音頻流。它們還用于電視和手機(jī)，將數(shù)字視頻數(shù)據(jù)轉(zhuǎn)換為模擬視頻信號(hào)，再連接到屏幕驅(qū)動(dòng)器，以顯示單色或彩色圖像。

GENERAL DESCRIPTION

The AD5334/AD5335/AD5336/AD5344 are quad 8-, 10-, and 12-bit DACs. They operate from a 2.5 V to 5.5 V supply consuming just 500 μA at 3 V, and feature a power-down mode that further reduces the current to 80 nA. These devices incorporate an on-chip output buffer that can drive the output to both supply rails.

FEATURES

AD5334: Quad 8-Bit DAC in 24-Lead TSSOP

AD5335: Quad 10-Bit DAC in 24-Lead TSSOP

AD5336: Quad 10-Bit DAC in 28-Lead TSSOP

AD5344: Quad 12-Bit DAC in 28-Lead TSSOP

Low Power Operation: 500 μA @ 3 V, 600 μA @ 5 V

Power-Down to 80 nA @ 3 V, 200 nA @ 5 V via PD Pin

2.5 V to 5.5 V Power Supply

Double-Buffered Input Logic

Guaranteed Monotonic by Design Over All Codes

Output Range: 0–VREF or 0–2 VREF

Power-On Reset to Zero Volts

Simultaneous Update of DAC Outputs via LDAC Pin

Asynchronous CLR Facility

Low Power Parallel Data Interface

On-Chip Rail-to-Rail Output Buffer Amplifiers

Temperature Range: –40°C to +105°C

APPLICATIONS

Portable Battery-Powered Instruments

Digital Gain and Offset Adjustment

Programmable Voltage and Current Sources

Programmable Attenuators

Industrial Process Control