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AD5323BRUZ-REEL71中文資料亞德諾數(shù)據(jù)手冊PDF規(guī)格書

AD5323BRUZ-REEL71
廠商型號

AD5323BRUZ-REEL71

功能描述

2.5 V to 5.5 V, 230 關(guān)A, Dual Rail-to-Rail Voltage Output 8-/10-/12-Bit DACs

文件大小

464.4 Kbytes

頁面數(shù)量

28

生產(chǎn)廠商 Analog Devices
企業(yè)簡稱

AD亞德諾

中文名稱

亞德諾半導(dǎo)體技術(shù)有限公司官網(wǎng)

原廠標識
數(shù)據(jù)手冊

下載地址一下載地址二到原廠下載

更新時間

2025-1-3 18:01:00

AD5323BRUZ-REEL71規(guī)格書詳情

GENERAL DESCRIPTION

The AD5303/AD5313/AD5323 are dual 8-/10-/12-bit buffered voltage output DACs in a 16-lead TSSOP package that operate from a single 2.5 V to 5.5 V supply, consuming 230 μA at 3 V. Their on-chip output amplifiers allow the outputs to swing rail-torail with a slew rate of 0.7 V/μs. The AD5303/AD5313/AD5323 utilize a versatile 3-wire serial interface that operates at clock rates up to 30 MHz and is compatible with standard SPI, QSPI?, MICROWIRE?, and DSP interface standards.

FEATURES

AD5303: 2 buffered 8-bit DACs in 1 package A version: ±1 LSB INL, B version: ±0.5 LSB INL

AD5313: 2 buffered 10-bit DACs in 1 package A version: ±4 LSB INL, B version: ±2 LSB INL

AD5323: 2 buffered 12-bit DACs in 1 package A version: ±16 LSB INL, B version: ±8 LSB INL

16-lead TSSOP package

Micropower operation: 300 μA @ 5 V (including reference current)

Power-down to 200 nA @ 5 V, 50 nA @ 3 V

2.5 V to 5.5 V power supply

Double-buffered input logic

Guaranteed monotonic by design over all codes

Buffered/unbuffered reference input options

Output range: 0 V to VREF or 0 V to 2 VREF

Power-on-reset to 0 V

SDO daisy-chaining option

Simultaneous update of DAC outputs via LDAC pin

Asynchronous CLR facility

Low power serial interface with Schmitt-triggered inputs

On-chip rail-to-rail output buffer amplifiers

APPLICATIONS

Portable battery-powered instruments

Digital gain and offset adjustment

Programmable voltage and current sources

Programmable attenuators

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