AD5341集成電路（IC）的數(shù)模轉(zhuǎn)換器（DAC）規(guī)格書PDF中文資料

AD5341屬于集成電路（IC）的數(shù)模轉(zhuǎn)換器（DAC）。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的AD5341數(shù)模轉(zhuǎn)換器（DAC）數(shù)模轉(zhuǎn)換器（DAC、D/A、D2A 或 D 轉(zhuǎn) A）可將數(shù)字信號(hào)轉(zhuǎn)換為緩沖或無緩沖的模擬電壓或電流。DAC 架構(gòu)是否適合特定應(yīng)用，要取決于分辨率和采樣頻率。DAC 通常用于音樂播放器，將數(shù)字?jǐn)?shù)據(jù)流轉(zhuǎn)換為模擬音頻流。它們還用于電視和手機(jī)，將數(shù)字視頻數(shù)據(jù)轉(zhuǎn)換為模擬視頻信號(hào)，再連接到屏幕驅(qū)動(dòng)器，以顯示單色或彩色圖像。

GENERAL DESCRIPTION

The AD5304/AD5314/AD53241 are quad 8-, 10-, and 12-bit buffered voltage output DACs in 10-lead MSOP and 10-lead LFCSP packages that operate from a single 2.5 V to 5.5 V supply, consuming 500 μA at 3 V. Their on-chip output amplifiers allow rail-to-rail output swing to be achieved with a slew rate of 0.7 V/μs. A 3-wire serial interface is used; it operates at clock rates up to 30 MHz and is compatible with standard SPI, QSPI, MICROWIRE, and DSP interface standards.

FEATURES

AD5304: 4 buffered 8-Bit DACs in 10-lead MSOP and

10-lead LFCSP

A, W Version: ±1 LSB INL, B Version: ±0.625 LSB INL

AD5314: 4 buffered 10-Bit DACs in 10-lead MSOP and

10-lead LFCSP

A, W Version: ±4 LSB INL, B Version: ±2.5 LSB INL

AD5324: 4 buffered 12-Bit DACs in 10-lead MSOP and

10-lead LFCSP

A, W Version: ±16 LSB INL, B Version: ±10 LSB INL

Low power operation: 500 μA @ 3 V, 600 μA @ 5 V

2.5 V to 5.5 V power supply

Guaranteed monotonic by design over all codes

Power-down to 80 nA @ 3 V, 200 nA @ 5 V

Double-buffered input logic

Output range: 0 V to VREF

Power-on reset to 0 V

Simultaneous update of outputs (LDAC function)

Low power-, SPI?-, QSPI?-, MICROWIRE?-, and

DSP-compatible 3-wire serial interface

On-chip, rail-to-rail output buffer amplifiers

Temperature range ?40°C to +105°C

Qualified for automotive applications

APPLICATIONS

Portable battery-powered instruments

Digital gain and offset adjustment

Programmable voltage and current sources

Programmable attenuators

Industrial process controls