AD5363BCPZ集成電路（IC）的數(shù)模轉(zhuǎn)換器（DAC）規(guī)格書PDF中文資料

AD5363BCPZ屬于集成電路（IC）的數(shù)模轉(zhuǎn)換器（DAC）。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的AD5363BCPZ數(shù)模轉(zhuǎn)換器（DAC）數(shù)模轉(zhuǎn)換器（DAC、D/A、D2A 或 D 轉(zhuǎn) A）可將數(shù)字信號轉(zhuǎn)換為緩沖或無緩沖的模擬電壓或電流。DAC 架構(gòu)是否適合特定應(yīng)用，要取決于分辨率和采樣頻率。DAC 通常用于音樂播放器，將數(shù)字?jǐn)?shù)據(jù)流轉(zhuǎn)換為模擬音頻流。它們還用于電視和手機(jī)，將數(shù)字視頻數(shù)據(jù)轉(zhuǎn)換為模擬視頻信號，再連接到屏幕驅(qū)動器，以顯示單色或彩色圖像。

GENERAL DESCRIPTION

The AD5362/AD5363 contains 8, 16/14-bit DACs in a single, 56-lead, LFCSP or 52-lead LQFP package. It provides buffered voltage outputs with a span 4 times the reference voltage. The gain and offset of each DAC can be independently trimmed to remove errors. For even greater flexibility, the device is divided

into two groups of 4 DACs, and the output range of each group can be independently adjusted by an offset DAC.

FEATURES

8-channel DAC in 52-LQFP and 56-LFCSP

Guaranteed monotonic to 16/14 bits

Nominal output voltage range of -10 V to +10 V

Multiple output spans available

Temperature Monitoring Function

Channel Monitoring Multiplexer

GPIO Function

System calibration function allowing user-programmable offset and gain

Channel grouping and addressing features

Data error checking feature

SPI compatible serial interface

2.5 V to 5.5 V JEDEC-compliant digital levels

Power-on reset

Digital reset (RESET)

Clear function to user-defined SIGGND (CLRpin)

Simultaneous update of DAC outputs (LDACpin)

APPLICATIONS

Instrumentation

Industrial Control System

PLC Analog I/O Cards

Level setting in automatic test equipment (ATE)

Variable optical attenuators (VOA)

Precision Medical Instruments