GENERAL DESCRIPTION

The AD73571 is a dual, 14-bit, high speed, low power, successive approximation analog-to-digital converter (ADC) that operates from a single 2.5 V power supply and features throughput rates up

to 4.2 MSPS. The part contains two ADCs, each preceded by a low noise, wide bandwidth track-and-hold circuit that can handle input frequencies in excess of 110 MHz.

FEATURES

Dual 14-bit SAR ADC

Simultaneous sampling

Throughput rate: 4.2 MSPS per channel

Specified for VDDof 2.5 V

Power dissipation: 35 mW at 4.2 MSPS

On-chip reference: 2.048 V ± 0.25, 6 ppm/°C

Dual conversion with read

High speed serial interface SPI-/QSPI-/MICROWIRE-/DSP-compatible

?40°C to +125°C operation

Shutdown mode: 10 μA maximum

16-lead TSSOP package

AD7367屬于集成電路（IC） > 模數(shù)轉(zhuǎn)換器（ADC）。亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的AD7367模數(shù)轉(zhuǎn)換器（ADC）模數(shù)轉(zhuǎn)換器（ADC、A/D 或 A 轉(zhuǎn) D）對(duì)模擬信號(hào)進(jìn)行采樣，例如由麥克風(fēng)采集的聲音或傳感器的輸出，然后將其轉(zhuǎn)換為數(shù)字信號(hào)。一般來說，數(shù)字輸出是二進(jìn)制補(bǔ)碼二進(jìn)制數(shù)，與輸入成比例。輸入類型可能是差分、偽差分或單端輸入。模數(shù)轉(zhuǎn)換器可按照位數(shù)、采樣率、輸入數(shù)、接口、轉(zhuǎn)換器數(shù)和架構(gòu)（例如自適應(yīng)增量、雙斜率、折疊、流水線、SAR、三角積分、兩步式）進(jìn)行選擇。