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AD800-52BR集成電路(IC)的應(yīng)用特定時(shí)鐘/定時(shí)規(guī)格書PDF中文資料
廠商型號(hào) |
AD800-52BR |
參數(shù)屬性 | AD800-52BR 封裝/外殼為20-SOIC(0.295",7.50mm 寬);包裝為散裝;類別為集成電路(IC)的應(yīng)用特定時(shí)鐘/定時(shí);產(chǎn)品描述:IC CLKDATA RECOVERY PLL 20-SOIC |
功能描述 | Clock Recovery and Data Retiming Phase-Locked Loop |
封裝外殼 | 20-SOIC(0.295",7.50mm 寬) |
文件大小 |
253.41 Kbytes |
頁(yè)面數(shù)量 |
12 頁(yè) |
生產(chǎn)廠商 | Analog Devices |
企業(yè)簡(jiǎn)稱 |
AD【亞德諾】 |
中文名稱 | 亞德諾半導(dǎo)體技術(shù)有限公司官網(wǎng) |
原廠標(biāo)識(shí) | |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-2-1 23:00:00 |
AD800-52BR規(guī)格書詳情
AD800-52BR屬于集成電路(IC)的應(yīng)用特定時(shí)鐘/定時(shí)。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的AD800-52BR應(yīng)用特定時(shí)鐘/定時(shí)專用時(shí)鐘和計(jì)時(shí) IC(集成電路)產(chǎn)品族中的產(chǎn)品主要用于執(zhí)行與時(shí)間或頻率信息生成和分配相關(guān)的各種操作,適合的設(shè)計(jì)環(huán)境較特定,例如 AMD 和 Intel 的中央處理單元 (CPU) 或圖形處理單元 (GPU)、DVD 音頻設(shè)備、藍(lán)光光盤播放器、以太網(wǎng)設(shè)備、PCIe、SATA、光纖通道接口、車載娛樂總線等。
PRODUCT DESCRIPTION
The AD800 and AD802 employ a second order phase-locked loop architecture to perform clock recovery and data retiming on Non-Return to Zero, NRZ, data. This architecture is capable of supporting data rates between 20 Mbps and 160 Mbps. The products described here have been defined to work with standard telecommunications bit rates. 45 Mbps DS-3 and 52 Mbps STS-1 are supported by the AD800-45 and AD800-52 respectively. 155 Mbps STS-3 or STM-1 are supported by the AD802-155.
Unlike other PLL-based clock recovery circuits, these devices do not require a preamble or an external VCXO to lock onto input data. The circuit acquires frequency and phase lock using two control loops. The frequency acquisition control loop initially acquires the clock frequency of the input data. The phase-lock loop then acquires the phase of the input data, and ensures that the phase of the output signals track changes in the phase of the input data. The loop damping of the circuit is dependent on the value of a user selected capacitor; this defines jitter peaking performance and impacts acquisition time. The devices exhibit 0.08 dB jitter peaking, and acquire lock on random or scrambled data within 4 × 105 bit periods when using a damping factor of 5.
FEATURES
Standard Products
44.736 Mbps—DS-3
51.84 Mbps—STS-1
155.52 Mbps—STS-3 or STM-1
Accepts NRZ Data, No Preamble Required
Recovered Clock and Retimed Data Outputs
Phase-Locked Loop Type Clock Recovery—No Crystal Required
Random Jitter: 208 Peak-to-Peak
Pattern Jitter: Virtually Eliminated
10KH ECL Compatible
Single Supply Operation: –5.2 V or +5 V
Wide Operating Temperature Range: –408C to +858C
產(chǎn)品屬性
更多- 產(chǎn)品編號(hào):
AD800-52BR
- 制造商:
Analog Devices Inc.
- 類別:
集成電路(IC) > 應(yīng)用特定時(shí)鐘/定時(shí)
- 包裝:
散裝
- PLL:
是
- 主要用途:
DS-3,STS-1
- 輸入:
ECL
- 輸出:
ECL
- 比率 - 輸入:
1:2
- 差分 - 輸入:
是/是
- 頻率 - 最大值:
51.84MHz
- 電壓 - 供電:
-4.5V ~ -5.5V
- 工作溫度:
-40°C ~ 85°C
- 安裝類型:
表面貼裝型
- 封裝/外殼:
20-SOIC(0.295",7.50mm 寬)
- 供應(yīng)商器件封裝:
20-SOIC
- 描述:
IC CLKDATA RECOVERY PLL 20-SOIC
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
ADI/亞德諾 |
23+ |
NA/ |
419 |
優(yōu)勢(shì)代理渠道,原裝正品,可全系列訂貨開增值稅票 |
詢價(jià) | ||
AD |
2020+ |
SOP |
80000 |
只做自己庫(kù)存,全新原裝進(jìn)口正品假一賠百,可開13%增 |
詢價(jià) | ||
AD |
24+ |
SOP-20 |
16800 |
絕對(duì)原裝進(jìn)口現(xiàn)貨,假一賠十,價(jià)格優(yōu)勢(shì)!? |
詢價(jià) | ||
AD |
21+ |
SOP20 |
5050 |
原裝現(xiàn)貨假一賠十 |
詢價(jià) | ||
ANALOG DEVICES |
22+ |
SMD |
518000 |
明嘉萊只做原裝正品現(xiàn)貨 |
詢價(jià) | ||
Analog |
23+ |
NA |
6216 |
專做原裝正品,假一罰百! |
詢價(jià) | ||
AD |
SOP |
608900 |
原包原標(biāo)簽100%進(jìn)口原裝常備現(xiàn)貨! |
詢價(jià) | |||
AD |
22+ |
SOP16 |
8000 |
原裝正品支持實(shí)單 |
詢價(jià) | ||
AD |
23+ |
SOP20 |
3200 |
全新原裝、誠(chéng)信經(jīng)營(yíng)、公司現(xiàn)貨銷售! |
詢價(jià) | ||
ADI/亞德諾 |
23+ |
N/A |
16800 |
正規(guī)渠道,只有原裝! |
詢價(jià) |