AD8022AR開發(fā)板套件編程器的評估板-運算放大器規(guī)格書PDF中文資料

AD8022AR屬于開發(fā)板套件編程器的評估板-運算放大器。由亞德諾半導體技術有限公司制造生產的AD8022AR評估板 - 運算放大器運算放大器評估板是裝有元器件的電路，用于提供特定集成電路或器件的工作實例。該產品族中的電路板提供了運算放大器實例。每個 IC 的通道類型有單通道、雙通道、三通道、四通道和八通道，放大器類型包括音頻、自動歸零、緩沖器、斬波器、電流反饋、電流檢測、差動、差分、四通道、儀表、隔離、J-FET、限幅、對數、功率、可編程增益、采樣保持、跨阻、可變增益、視頻、電壓反饋和零漂移。

GENERAL DESCRIPTIONS

The AD8022 consists of two low noise, high speed, voltage feedback amplifiers. Each amplifier consumes only 4.0 mA of quiescent current, yet has only 2.5 nV/√Hz of voltage noise. These dual amplifiers provide wideband, low distortion performance, with high output current optimized for stability when driving capacitive loads. Manufactured on ADI’s high voltage generation of XFCB bipolar process, the AD8022 operates on a wide range of supply voltages. The AD8022 is available in both an 8-lead MSOP and an 8-lead SOIC. Fast over voltage recovery and wide bandwidth make the AD8022 ideal as the receive channel front end to an ADSL, VDSL, or proprietary xDSL transceiver design.

FEATURES

Low power amplifiers provide low noise and low distortion,

ideal for xDSL modem receiver

Wide supply range: +5 V, ±2.5 V to ±12 V voltage supply

Low power consumption: 4.0 mA/Amp

Voltage feedback

Ease of Use

Lower total noise (insignificant input current noise

contribution compared to current feedback amps)

Low noise and distortion

2.5 nV/√Hz voltage noise @ 100 kHz

1.2 pA/√Hz current noise

MTPR < ?66 dBc (G = +7)

SFDR 110 dB @ 200 kHz

High speed

130 MHz bandwidth (?3 dB), G = +1

Settling time to 0.1, 68 ns

50 V/μs slew rate

High output swing: ±10.1 V on ±12 V supply

Low offset voltage, 1.5 mV typical

APPLICATIONS

Receiver for ADSL, VDSL, HDSL, and proprietary

xDSL systems

Low noise instrumentation front end

Ultrasound preamps

Active filters

16-bit ADC buffers