AD8192ACPZ-RL7集成電路（IC）的視頻處理規(guī)格書PDF中文資料

AD8192ACPZ-RL7屬于集成電路（IC）的視頻處理。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的AD8192ACPZ-RL7視頻處理一種集成電路 (IC) 半導(dǎo)體器件，設(shè)計用于在放大、增強(qiáng)、編碼器和解碼器（編解碼器）、緩沖、校準(zhǔn)、處理、信號調(diào)節(jié)、調(diào)制與解調(diào)、轉(zhuǎn)換、傳輸、伽瑪校正、切換、OSD、數(shù)字化和多路復(fù)用等應(yīng)用中處理音頻和/或視頻信號。

GENERAL DESCRIPTION

The AD8192 is a complete HDMI?/DVI link switch featuring equalized TMDS inputs and pre-emphasized TMDS outputs ideal for systems with long cable runs. The TMDS outputs can be set to a high impedance state to reduce the power dissipation and/or allow the construction of larger arrays using the wireOR technique. The AD8192 includes bidirectional buffering for the DDC bus and CEC line, with integrated pull-up resistors for the CEC line. The AD8192 is available in a space-saving, 56-lead LFCSP surface-mount, lead-free plastic package specified to operate over the ?40°C to +85°C temperature range.

FEATURES

2 inputs, 1 output HDMI/DVI links

HDMI 1.3a receive and transmit compliant

±7 kV HBM ESD on HDMI input pins

4 TMDS channels per link

Supports 250 Mbps to 2.25 Gbps data rates and beyond

Supports 25 MHz to 225 MHz pixel clocks and beyond

Fully buffered unidirectional inputs/outputs

Switchable 50 Ω on-chip input terminations with

programmable or automatic control on channel switch

Equalized inputs and pre-emphasized outputs

Low added jitter

Output disable feature for reduced power dissipation

Switched output termination for building of larger arrays

Bidirectional and cascadable DDC buffers (SDA/SCL)

DDC bus logic level translation (3.3 V, 5 V)

Bidirectional and cascadable CEC buffer with integrated

pull-up resistors (27 kΩ)

Hot plug detect pulse low on channel switch

Standards compatible: DVI, HDMI 1.3a, HDCP, I2C

Serial (I2C slave) control interface

56-lead, 8 mm × 8 mm LFCSP, RoHS-compliant package

APPLICATIONS

Front panel buffer for advanced television (HDTV) sets

Standalone HDMI switcher

Multiple input displays

Projectors

A/V receivers

Set-top boxes