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AD8309ARUZ中文資料亞德諾數(shù)據(jù)手冊(cè)PDF規(guī)格書

AD8309ARUZ
廠商型號(hào)

AD8309ARUZ

功能描述

5 MHz??00 MHz 100 dB Demodulating Logarithmic Amplifier

文件大小

315.17 Kbytes

頁(yè)面數(shù)量

20 頁(yè)

生產(chǎn)廠商 Analog Devices
企業(yè)簡(jiǎn)稱

AD亞德諾

中文名稱

亞德諾半導(dǎo)體技術(shù)有限公司官網(wǎng)

原廠標(biāo)識(shí)
數(shù)據(jù)手冊(cè)

下載地址一下載地址二到原廠下載

更新時(shí)間

2025-3-20 19:46:00

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AD8309ARUZ規(guī)格書詳情

PRODUCT DESCRIPTION

The AD8309 is a complete IF limiting amplifier, providing both an accurate logarithmic (decibel) measure of the input signal (the RSSI function) over a dynamic range of 100 dB, and a programmable limiter output, useful from 5 MHz to 500 MHz.

It is easy to use, requiring few external components. A single supply voltage of +2.7 V to +6.5 V at 16 mA is needed, corresponding to a power consumption of under 50 mW at 3 V, plus the limiter bias current, determined by the application and typically 2 mA, providing a limiter gain of 100 dB when using 200 ? loads. A CMOS-compatible control interface can enable the AD8309 within about 500 ns and disable it to a standby current of under 1 μA.

The six cascaded amplifier/limiter cells in the main path have a small signal gain of 12.04 dB (×4), with a –3 dB bandwidth of 850 MHz, providing a total gain of 72 dB. The programmable output stage provides a further 18 dB of gain. The input is fully differential and presents a moderately high impedance (1 k? in parallel with 2.5 pF). The input-referred noise-spectral-density, when driven from a terminated 50 ?, source is 1.28 nV/√Hz, equivalent to a noise figure of 3 dB. The sensitivity of the AD8309 can be raised by using an input matching network.

Each of the main gain cells includes a full-wave detector. An additional four detectors, driven by a broadband attenuator, are used to extend the top end of the dynamic range by over 48 dB.

FEATURES

Complete Multistage Log-Limiting IF Amplifier

100 dB Dynamic Range: –78 dBm to +22 dBm (Re 50 V)

Stable RSSI Scaling Over Temperature and Supplies:

20 mV/dB Slope, –95 dBm Intercept

60.4 dB RSSI Linearity up to 200 MHz

Programmable Limiter Gain and Output Current

Differential Outputs to 10 mA, 2.4 V p-p

Overall Gain 100 dB, Bandwidth 500 MHz

Constant Phase (Typical 680 ps Delay Skew)

Single Supply of +2.7 V to +6.5 V at 16 mA Typical

Fully Differential Inputs, RIN = 1 kV, CIN = 2.5 pF

500 ns Power-Up Time, <1 mA Sleep Current

APPLICATIONS

Receivers for Frequency and Phase Modulation

Very Wide Range IF and RF Power Measurement

Receiver Signal Strength Indication (RSSI)

Low Cost Radar and Sonar Signal Processing

Instrumentation: Network and Spectrum Analyzers

產(chǎn)品屬性

  • 型號(hào):

    AD8309ARUZ

  • 功能描述:

    IC LOGARITHM AMP 100DB 16-TSSOP

  • RoHS:

  • 類別:

    集成電路(IC) >> 線性 - 放大器 - 專用

  • 系列:

    -

  • 產(chǎn)品培訓(xùn)模塊:

    Lead(SnPb) Finish for COTS Obsolescence Mitigation Program

  • 標(biāo)準(zhǔn)包裝:

    60

  • 類型:

    可變?cè)鲆娣糯笃?

  • 應(yīng)用:

    CATV

  • 安裝類型:

    表面貼裝

  • 封裝/外殼:

    20-WQFN 裸露焊盤

  • 供應(yīng)商設(shè)備封裝:

    20-TQFN-EP(5x5)

  • 包裝:

    托盤

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