GENERAL DESCRIPTION

The AD9222 is an octal, 12-bit, 40/50/65 MSPS analog-todigital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use. The product operates at a conversion rate of up to 65 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.

FEATURES

8 ADCs integrated into 1 package

114 mW ADC power per channel at 65 MSPS

SNR = 70 dB (to Nyquist)

ENOB = 11.3 bits

SFDR = 80 dBc

Excellent linearity: DNL = ±0.3 LSB (typical),

INL = ±0.4 LSB (typical)

Serial LVDS (ANSI-644, default)

Low power, reduced signal option (similar IEEE 1596.3)

Data and frame clock outputs

325 MHz full-power analog bandwidth

2 V p-p input voltage range

1.8 V supply operation

Serial port control

Full-chip and individual-channel power-down modes

Flexible bit orientation

Built-in and custom digital test pattern generation

Programmable clock and data alignment

Programmable output resolution

Standby mode

APPLICATIONS

Medical imaging and nondestructive ultrasound

Portable ultrasound and digital beam-forming systems

Quadrature radio receivers

Diversity radio receivers

Tape drives

Optical networking

Test equipment

AD9222ABCPZRL7-50屬于集成電路（IC） > 模數(shù)轉換器（ADC）。亞德諾半導體技術有限公司制造生產(chǎn)的AD9222ABCPZRL7-50模數(shù)轉換器（ADC）模數(shù)轉換器（ADC、A/D 或 A 轉 D）對模擬信號進行采樣，例如由麥克風采集的聲音或傳感器的輸出，然后將其轉換為數(shù)字信號。一般來說，數(shù)字輸出是二進制補碼二進制數(shù)，與輸入成比例。輸入類型可能是差分、偽差分或單端輸入。模數(shù)轉換器可按照位數(shù)、采樣率、輸入數(shù)、接口、轉換器數(shù)和架構（例如自適應增量、雙斜率、折疊、流水線、SAR、三角積分、兩步式）進行選擇。