AD9229ABCPZ-65集成電路（IC）的模數(shù)轉(zhuǎn)換器（ADC）規(guī)格書(shū)PDF中文資料

AD9229ABCPZ-65屬于集成電路（IC）的模數(shù)轉(zhuǎn)換器（ADC）。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的AD9229ABCPZ-65模數(shù)轉(zhuǎn)換器（ADC）模數(shù)轉(zhuǎn)換器（ADC、A/D 或 A 轉(zhuǎn) D）對(duì)模擬信號(hào)進(jìn)行采樣，例如由麥克風(fēng)采集的聲音或傳感器的輸出，然后將其轉(zhuǎn)換為數(shù)字信號(hào)。一般來(lái)說(shuō)，數(shù)字輸出是二進(jìn)制補(bǔ)碼二進(jìn)制數(shù)，與輸入成比例。輸入類型可能是差分、偽差分或單端輸入。模數(shù)轉(zhuǎn)換器可按照位數(shù)、采樣率、輸入數(shù)、接口、轉(zhuǎn)換器數(shù)和架構(gòu)（例如自適應(yīng)增量、雙斜率、折疊、流水線、SAR、三角積分、兩步式）進(jìn)行選擇。

GENERAL DESCRIPTION

The AD9229 is a quad, 12-bit, 65 MSPS analog-to-digital converter (ADC) with an on-chip sample-and-hold circuit that is designed for low cost, low power, small size, and ease of use. The product operates at up to a 65 MSPS conversion rate and is optimized for outstanding dynamic performance in applications where a small package size is critical.

FEATURES

Four ADCs in 1 package

Serial LVDS digital output data rates

to 780 Mbps (ANSI-644)

Data and frame clock outputs

SNR = 69.5 dB (to Nyquist)

Excellent linearity

DNL = ±0.3 LSB (typical)

INL = ±0.4 LSB (typical)

400 MHz full power analog bandwidth

Power dissipation

1,350 mW at 65 MSPS

985 mW at 50 MSPS

1 V p-p to 2 V p-p input voltage range

3.0 V supply operation

Power-down mode

Digital test pattern enable for timing alignments

APPLICATIONS

Digital beam-forming systems for ultrasound

Wireless and wired broadband communications

Communication test equipment