AD9230開發(fā)板套件編程器的評(píng)估板-模數(shù)轉(zhuǎn)換器（ADC）規(guī)格書PDF中文資料

AD9230屬于開發(fā)板套件編程器的評(píng)估板-模數(shù)轉(zhuǎn)換器（ADC）。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的AD9230評(píng)估板 - 模數(shù)轉(zhuǎn)換器（ADC）模數(shù)轉(zhuǎn)換器 (ADC) 評(píng)估板是預(yù)裝有元器件的電路板，用于提供特定 ADC 或器件工作實(shí)例。特定板上的 A/D 轉(zhuǎn)換器數(shù)量從 3 到 32 不等，每秒采樣率從 2.5 kHz 到 26 GHz 不等，輸入電壓范圍從 0 到 8 Vp-p。

PRODUCT DESCRIPTION

The AD9230 is a 12-bit monolithic sampling analog-to-digital converter optimized for high performance, low power, and ease of use. The product operates up to a 250 MSPS conversion rate and is optimized for outstanding dynamic performance in wideband carrier and broadband systems. All necessary functions, including a track-and-hold (T/H) and voltage reference, are included on the chip to provide a complete signal conversion solution.

FEATURES

SNR = 65.5 dBFs @ fIN up to 70 MHz @ 250 MSPS

ENOB of 10.6 @ fIN up to 70 MHz @ 250 MSPS (–0.5 dBFS)

SFDR = 82 dBc@ fIN up to 70 MHz @ 250 MSPS (–0.5 dBFS)

Excellent Linearity

DNL = ±0.3 LSB (Typical)

INL = ±0.5 LSB (Typical)

LVDS at 250 MSPS (ANSI-644 levels)

900 MHz Full Power Analog Bandwidth

On-Chip Reference and Track-and-Hold

Power Dissipation = 425 mW Typical @ 250 MSPS

1.25 V Input Voltage Range

1.8 V Analog Supply Operation

Output Data Format Option

Data Clock Output Provided

Clock Duty Cycle Stabilizer

APPLICATIONS

Wireless and Wired Broadband Communications

Cable Reverse Path

Communications Test Equipment

Radar and Satellite Subsystems

Power Amplifier Linearization