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AD9577BCPZ-RL集成電路(IC)的應(yīng)用特定時(shí)鐘/定時(shí)規(guī)格書PDF中文資料
廠商型號(hào) |
AD9577BCPZ-RL |
參數(shù)屬性 | AD9577BCPZ-RL 封裝/外殼為40-WFQFN 裸露焊盤,CSP;包裝為托盤;類別為集成電路(IC)的應(yīng)用特定時(shí)鐘/定時(shí);產(chǎn)品描述:IC CLK GEN PLL DUAL 40LFCSP |
功能描述 | Clock Generator with Dual PLLs |
文件大小 |
672.93 Kbytes |
頁(yè)面數(shù)量 |
44 頁(yè) |
生產(chǎn)廠商 | Analog Devices |
企業(yè)簡(jiǎn)稱 |
AD【亞德諾】 |
中文名稱 | 亞德諾半導(dǎo)體技術(shù)有限公司官網(wǎng) |
原廠標(biāo)識(shí) | |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-1-3 11:02:00 |
AD9577BCPZ-RL規(guī)格書詳情
AD9577BCPZ-RL屬于集成電路(IC)的應(yīng)用特定時(shí)鐘/定時(shí)。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的AD9577BCPZ-RL應(yīng)用特定時(shí)鐘/定時(shí)專用時(shí)鐘和計(jì)時(shí) IC(集成電路)產(chǎn)品族中的產(chǎn)品主要用于執(zhí)行與時(shí)間或頻率信息生成和分配相關(guān)的各種操作,適合的設(shè)計(jì)環(huán)境較特定,例如 AMD 和 Intel 的中央處理單元 (CPU) 或圖形處理單元 (GPU)、DVD 音頻設(shè)備、藍(lán)光光盤播放器、以太網(wǎng)設(shè)備、PCIe、SATA、光纖通道接口、車載娛樂(lè)總線等。
GENERAL DESCRIPTION
The AD9577 provides a multioutput clock generator function, along with two on-chip phase-locked loop cores, PLL1 and PLL2, optimized for network clocking applications. The PLL designs are based on the Analog Devices, Inc., proven portfolio of high performance, low jitter frequency synthesizers to maximize network performance. The PLLs have I2C programmable output frequencies and formats. The fractional-N PLL can support spread spectrum clocking for reduced EMI radiated peak power. Both PLLs can support frequency margining. Other applications with demanding phase noise and jitter requirements can benefit from this part.
FEATURES
Fully integrated dual PLL/VCO cores
1 integer-N and 1 fractional-N PLL
Continuous frequency coverage from 11.2 MHz to 200 MHz
Most frequencies from 200 MHz to 637.5 MHz available
PLL1 phase jitter (12 kHz to 20 MHz): 460 fs rms typical
PLL2 phase jitter (12 kHz to 20 MHz)
Integer-N mode: 470 fs rms typical
Fractional-N mode: 660 fs rms typical
Input crystal or reference clock frequency
Optional reference frequency divide-by-2
I2C programmable output frequencies
Up to 4 LVDS/LVPECL or up to 8 LVCMOS output clocks
1 CMOS buffered reference clock output
Spread spectrum: downspread [0, ?0.5]
2 pin-controlled frequency maps: margining
Integrated loop filters
Space saving, 6 mm × 6 mm, 40-lead LFCSP package
1.02 W power dissipation (LVDS operation)
1.235 W power dissipation (LVPECL operation)
3.3 V operation
APPLICATIONS
Low jitter, low phase noise multioutput clock generator for
data communications applications including Ethernet,
Fibre Channel, SONET, SDH, PCI-e, SATA, PTN, OTN,
ADC/DAC, and digital video
Spread spectrum clocking
產(chǎn)品屬性
更多- 產(chǎn)品編號(hào):
AD9577BCPZ-RL
- 制造商:
Analog Devices Inc.
- 類別:
集成電路(IC) > 應(yīng)用特定時(shí)鐘/定時(shí)
- 包裝:
托盤
- PLL:
是
- 主要用途:
以太網(wǎng),PCI Express(PCIe),SONET/SDH
- 輸入:
時(shí)鐘,晶體
- 輸出:
LVCMOS,LVDS,LVPECL
- 比率 - 輸入:
2:5
- 差分 - 輸入:
無(wú)/是
- 頻率 - 最大值:
637.5MHz
- 電壓 - 供電:
3V ~ 3.6V
- 工作溫度:
-40°C ~ 85°C
- 安裝類型:
表面貼裝型
- 封裝/外殼:
40-WFQFN 裸露焊盤,CSP
- 供應(yīng)商器件封裝:
40-LFCSP-WQ(6x6)
- 描述:
IC CLK GEN PLL DUAL 40LFCSP
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
AnalogDevices |
24+ |
SMD |
17900 |
時(shí)鐘合成器/抖動(dòng)清除器DualVCOClockGenerator |
詢價(jià) | ||
AD |
2318+ |
WFQFN-40 |
7896 |
十年專業(yè)專注 ADI優(yōu)勢(shì)渠道正品保證 |
詢價(jià) | ||
ADI/亞德諾 |
2122+ |
NA |
24550 |
全新原裝正品現(xiàn)貨,假一賠十 |
詢價(jià) | ||
ADI(亞德諾)/LINEAR |
2117+ |
LFCSP-40 |
315000 |
2500個(gè)/圓盤一級(jí)代理專營(yíng)品牌!原裝正品,優(yōu)勢(shì)現(xiàn)貨, |
詢價(jià) | ||
Analog |
21+ |
25000 |
原廠原包 深圳現(xiàn)貨 主打品牌 假一賠百 可開(kāi)票! |
詢價(jià) | |||
ADI/亞德諾 |
23+ |
- |
6500 |
專注配單,只做原裝進(jìn)口現(xiàn)貨 |
詢價(jià) | ||
ADI/亞德諾 |
24+ |
LFCSP-40 |
25500 |
授權(quán)代理直銷,原廠原裝現(xiàn)貨,假一罰十,特價(jià)銷售 |
詢價(jià) | ||
ADI |
24+ |
40-Lead LFCSP (6mm x 6mm w/ EP |
3660 |
十年信譽(yù),只做全新原裝正品現(xiàn)貨,以優(yōu)勢(shì)說(shuō)話 !! |
詢價(jià) | ||
Analog Devices |
23+ |
35500 |
詢價(jià) | ||||
ADI/亞德諾 |
21+ |
原封裝 |
13880 |
公司只售原裝,支持實(shí)單 |
詢價(jià) |