AD9920ABBCZRL集成電路（IC）的模擬前端（AFE）規(guī)格書PDF中文資料

AD9920ABBCZRL屬于集成電路（IC）的模擬前端（AFE）。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的AD9920ABBCZRL模擬前端（AFE）模擬前端 (AFE) 是一種用于信號調(diào)節(jié)的半導(dǎo)體器件，由模擬放大器、運(yùn)算放大器、濾波器和集成電路構(gòu)成。這種可配置功能塊能連接各種傳感器。分辨率范圍從 8 位至 42 位不等，通道數(shù)范圍為 1 至 256 個(gè)。

GENERAL DESCRIPTION

The AD9920A is a highly integrated charge-coupled device (CCD) signal processor for digital still camera applications. It includes a complete analog front end (AFE) with analog-to-digital conversion, combined with a full-function programmable timing generator and 19-channel vertical driver (V-driver). The timing generator is capable of supporting up to 24 vertical clock signals to control advanced CCDs. The on-chip V-driver supports up to 19 channels for use with six-field CCDs. A Precision Timing? core allows adjustment of high speed clocks with approximately 400 ps resolution at 40.5 MHz operation. The AD9920A also contains six GPOs that can be used for shutter and system functions.

FEATURES

Integrated 19-channel V-driver

1.8 V AFETG core

24 programmable vertical clock signals

Correlated double sampler (CDS) with ?3 dB, 0 dB,

+3 dB, and +6 dB gain

12-bit, 40.5 MHz analog-to-digital converter (ADC)

Black level clamp with variable level control

Complete on-chip timing generator

Precision Timing core with ~400 ps resolution

On-chip 3 V horizontal and RG drivers

General-purpose outputs (GPOs) for shutter and

system support

On-chip sync generator with external sync input

On-chip 1.8 V low dropout (LDO) regulator

105-ball, 8 mm × 8 mm CSP_BGA package

APPLICATIONS

Digital still cameras