GENERAL DESCRIPTION

The AD9992 is a highly integrated CCD signal processor for digital still camera applications. It includes a complete analog front end with analog to digital conversion combined with a full-function programmable timing generator. The timing generator is capable of supporting up to 24 vertical clock signals to control advanced CCDs. A Precision Timing? core allows adjustment of high speed clocks with approximately 400 ps resolution at 40 MHz operation. The AD9992 also contains eight general-purpose inputs/outputs that can be used for shutter and system functions.

FEATURES

1.8 V AFETG core

Internal LDO regulator and charge pump circuitry

Compatibility with 3 V or 1.8 V systems

24 programmable vertical clock outputs

Correlated double sampler (CDS) with ?3 dB, 0 dB,

+3 dB, and +6 dB gain

6 dB to 42 dB, 10-bit variable gain amplifier (VGA)

12-bit, 40 MHz ADC

Black level clamp with variable level control

Complete on-chip timing generator

Precision Timing core with 400 ps resolution

On-chip 3 V horizontal and RG drivers

General-purpose outputs (GPOs) for shutter and

system support

On-chip driver for external crystal

On-chip sync generator with external sync input

105-lead CSP_BGA package, 8 mm × 8 mm, 0.65 mm pitch

APPLICATIONS

Digital still cameras

AD9992BBCZ屬于集成電路（IC） > 傳感器和檢測(cè)器接口。亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的AD9992BBCZ傳感器和檢測(cè)器接口該系列產(chǎn)品可執(zhí)行信號(hào)調(diào)節(jié)、數(shù)據(jù)轉(zhuǎn)換、激勵(lì)生成和/或各種將傳感器或變送器機(jī)構(gòu)連接到主機(jī)設(shè)備所需的其他功能。示例包括用于 CCD 圖像傳感器的控制器、用于 4-20 mA 接口和類似應(yīng)用的電流變送器、超聲變送器前端、惠斯通電橋接口等。