ADAU1850BCBZRL集成電路（IC）的編解碼器規(guī)格書PDF中文資料

ADAU1850BCBZRL屬于集成電路（IC）的編解碼器。由亞德諾半導體技術有限公司制造生產(chǎn)的ADAU1850BCBZRL編解碼器編解碼器是用于通過壓縮和解壓縮來轉換數(shù)據(jù)的半導體器件。數(shù)據(jù)壓縮可提高傳輸速度并減少存儲空間。某些編解碼器提供高達 32 位的分辨率，并且分別提供多達 6 個或 8 個模數(shù)轉換器和數(shù)模轉換器。除三角積分調(diào)制外，還有 I2C、I2S、SPI、串行、HDA、S/DIF、PCM、USB、AC'97 和 SLIMbus 數(shù)據(jù)接口。

FEATURES

? Programmable FastDSP audio processing engine

? Up to 768 kHz sample rate

? Biquad filters, limiters, volume controls, mixing

? Low latency, 24-bit ADCs and DAC

? 106 dB SNR (signal through ADC with A-weighted filter)

? 110 dB combined SNR (signal through DAC and headphone

with A-weighted filter)

? Serial port sample rates from 8 kHz to 768 kHz

? 5 μs analog-to-analog group delay

? Programmable, double precision MAC engine for 13-stage

equalizer

? 3 analog inputs (2 differential and 1 single-ended), configurable

as microphone or line inputs

? Analog differential audio output, configurable as either line output

or headphone driver

? PLL supporting any input clock rate from 30 kHz to 27 MHz

? Internal RC oscillator supporting autocalibration

? 1-channel ASRCI, 3-channel ASRCO

? Serial audio ports supporting I2S, left justified, or up to 16-channel

TDM (TDM16)

? 2 interpolators and 4 decimators with flexible routing

? Power supplies

? Analog AVDD at 1.8 V

? Digital I/O IOVDD at 1.8 V to 3.3 V

? Headphone HPVDD at 1.8 V

? Headphone HPVDD_L at 1.2 V to1.8 V

? Control/communication interfaces

? I2C, SPI, or UART

? 28-ball, 0.4 mm pitch, 2.957 mm × 1.757 mm WLCSP

APPLICATIONS

? Noise canceling handsets, headsets, and headphones

? Bluetooth active noise canceling (ANC) handsets, headsets, and

headphones

? Personal navigation devices

? Digital still and video cameras

? Musical instrument effect processors

? Multimedia speaker systems

? Smartphones