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ADC3669IRTD中文資料德州儀器數據手冊PDF規(guī)格書
ADC3669IRTD規(guī)格書詳情
1 Features
? 16-bit, dual channel 250 and 500MSPS ADC
? Noise spectral density: -160.4dBFS/Hz
? Thermal Noise: 76.4dBFS
? Single core (non-interleaved) ADC architecture
? Aperture jitter: 75fs
? Buffered analog inputs
– Programmable 100Ω and 200Ω termination
? Input fullscale: 2VPP
? Full power input bandwidth (-3dB): 1.4GHz
? Spectral performance (fIN = 70MHz, -1dBFS):
– SNR: 75.6dBFS
– SFDR HD2,3: 80dBc
– SFDR worst spur: 94dBFS
? INL: ±2 LSB (typical)
? DNL: ±0.5 LSB (typical)
? Digital down-converters (DDCs)
– Up to four independent DDCs
– Complex and real decimation
– Decimation: /2, /4 to /32768 decimation
– 48-bit NCO phase coherent frequency hopping
? DDR/Serial LVDS interface
– 16-bit Parallel DDR LVDS for DDC bypass
– Serial LVDS for decimation
– 32-bit output option for high decimation
? Power consumption: 300mW/channel (500MSPS)
2 Applications
? Software defined radio
? Spectrum analyzer
? Radar
? Spectroscopy
? Power amplifier linearization
? Communications infrastructure
3 Description
The ADC3668 and ADC3669 (ADC366x) are a 16-
bit, 250MSPS and 500MSPS, dual channel analog to
digital converters (ADC). The devices are designed
for high signal-to-noise ratio (SNR) and deliver a
noise spectral density of ?160dBFS/Hz (500MSPS).
The ADC366x includes an optional quad band
digital down-converter (DDC) supporting wide band
decimation by 2 to narrow band decimation by 32768.
The DDC uses a 48-bit NCO which supports phase
coherent and phase continuous frequency hopping.
The ADC366x is outfitted with a flexible LVDS
interface. In decimation bypass mode, the device
uses a 16-bit wide parallel DDR LVDS interface.
When using decimation, the output data is transmitted
using a serial LVDS interface reducing the number
of lanes needed as decimation increases. For high
decimation ratios, the output resolution can be
increased to 32-bit.
The power efficient ADC architecture consumes
300mW/ch at 500MSPS and provides power scaling
with lower sampling rates (250mW/ch at 250MSPS).
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