ADF4117集成電路（IC）的時鐘發(fā)生器PLL頻率合成器規(guī)格書PDF中文資料

ADF4117屬于集成電路（IC）的時鐘發(fā)生器PLL頻率合成器。由亞德諾半導體技術有限公司制造生產(chǎn)的ADF4117時鐘發(fā)生器，PLL，頻率合成器時鐘發(fā)生器、PLL 和頻率合成器集成電路 (IC) 可為邏輯器件提供參考信號的穩(wěn)定定時脈沖，這些器件包括計算機、微控制器、數(shù)據(jù)通信系統(tǒng)和圖形/視頻發(fā)生器。這些集成電路可能包括緩沖器、驅動器、分頻器、倍頻器、多路復用器、合成器、扇出分配器和預分頻器。

GENERAL DESCRIPTION

The ADF4116 family of frequency synthesizers can be used to implement local oscillators in the up-conversion and down conversion sections of wireless receivers and transmitters. They consist of a low-noise digital PFD (Phase Frequency Detector), a precision charge pump, a programmable reference divider, programmable A and B counters and a dual-modulus prescaler (P/P+1). The A (5-bit) and B (13-bit) counters, in conjunction with the dual modulus prescaler (P/P+1), implement an N divider (N = BP+A). In addition, the 14-bit reference counter (R Counter), allows selectable REFIN frequencies at the PFD input. A complete PLL (Phase-Locked Loop) can be implemented if the synthesizer is used with an external loop filter and VCO (Voltage Controlled Oscillator).

FEATURES

ADF4116: 550 MHz

ADF4117: 1.2 GHz

ADF4118: 3.0 GHz

2.7 V to 5.5 V Power Supply

Separate VP Allows Extended Tuning Voltage in 3 V Systems

Selected Charge Pump Currents

Dual Modulus Prescaler

ADF4116: 8/9

ADF4117/ADF4118: 32/33

3-Wire Serial Interface

Digital Lock Detect

Power-Down Mode

Fast Lock Mode

APPLICATIONS

Base Stations for Wireless Radio (GSM, PCS, DCS, CDMA, WCDMA)

Wireless Handsets (GSM, PCS, DCS, CDMA, WCDMA)

Wireless LANS

Communications Test Equipment

CATV Equipment