ADM483AR-REEL中文資料亞德諾數(shù)據(jù)手冊(cè)PDF規(guī)格書(shū)

GENERAL DESCRIPTION

The ADM483 is a low power differential line transceiver suitable for half-duplex data communication on multipoint bus transmission lines. It is designed for balanced data transmission, and complies with EIA Standards RS-485 and RS-422.The part contains a differential line driver and a differential line receiver. Both share the same differential pins, with either the driver or the receiver being enabled at any given time.

The device has an input impedance of 12 k?, allowing up to 32 transceivers on one bus. Since only one driver should be enabled at any time, the output of a disabled or powered-down driver is three-stated to avoid overloading the bus. This high impedance driver output is maintained over the entire common-mode voltage range from –7 V to +12 V.

The receiver contains a fail-safe feature that results in a logic high output state if the inputs are unconnected (floating). The driver outputs are slew-rate limited to reduce EMI and data errors caused by reflections from improperly terminated buses. Excessive power dissipation caused by bus contention or by output shorting is prevented by a thermal shutdown circuit.

The part is fully specified over the industrial temperature range, and is available in an 8-lead SOIC package.

FEATURES

EIA RS-485/RS-422-compliant

Data rates up to 250 kbps

Slew-rate limited for low EMI

100 nA supply current in shutdown mode

Low power consumption (120 μA)

Up to 32 transceivers on one bus

Outputs high-z when disabled or powered off

–7 V to +12 V bus common-mode range

Thermal shutdown and short-circuit protection

Pin-compatible with MAX483

Specified over –40°C to +85°C temperature range

Available in 8-lead SOIC package

APPLICATIONS

Low power RS-485 applications

EMI sensitive systems

DTE-DCE interfaces

Industrial control

Packet switching

Local area networks

Level translators