ADM485ARM集成電路（IC）的驅(qū)動(dòng)器接收器收發(fā)器規(guī)格書PDF中文資料

ADM485ARM屬于集成電路（IC）的驅(qū)動(dòng)器接收器收發(fā)器。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的ADM485ARM驅(qū)動(dòng)器，接收器，收發(fā)器該系列產(chǎn)品的主要功能是提供必需的硬件資源，以通過延長電纜或印制線進(jìn)行通信。確切的功能會(huì)因所采用的通信協(xié)議而異，可能包括諸如瞬態(tài)抑制之類的功能，這些功能對于通信用途可能并非絕對必要，但對于可能的使用環(huán)境卻是明智之選。

GENERAL DESCRIPTION

The ADM485 is a differential line transceiver suitable for high speed bidirectional data communication on multipoint bus transmission lines. It is designed for balanced data transmission and complies with EIA standards RS-485 and RS-422. The part contains a differential line driver and a differential line receiver. Both the driver and the receiver can be enabled independently. When disabled, the outputs are three-stated.

The ADM485 operates from a single 5 V power supply. Excessive power dissipation caused by bus contention or by output shorting is prevented by a thermal shutdown circuit. If during fault conditions, a significant temperature increase is detected in the internal driver circuitry, this feature forces the driver output into a high impedance state.

Up to 32 transceivers can be connected simultaneously on a bus, but only one driver should be enabled at any time. It is important, therefore, that the remaining disabled drivers do not load the bus. To ensure this, the ADM485 driver features high output impedance when disabled and when powered down, which minimizes the loading effect when the transceiver is not being used. The high impedance driver output is maintained over the common-mode voltage range of ?7 V to +12 V.

The receiver contains a fail-safe feature that results in a logic high output state if the inputs are unconnected (floating). The ADM485 is fabricated on BiCMOS, an advanced mixed technology process combining low power CMOS with fast switching bipolar technology. All inputs and outputs contain protection against ESD; all driver outputs feature high source and sink current capability. An epitaxial layer is used to guard against latch-up.

The ADM485 features extremely fast switching speeds. Minimal driver propagation delays permit transmission at data rates up to 5 Mbps while low skew minimizes EMI interference. The part is fully specified over the commercial and industrial temperature range and is available in 8-lead PDIP, 8-lead SOIC, and small footprint, 8-lead MSOP packages.

FEATURES

Meets EIA RS-485 standard

5 Mbps data rate

Single 5 V supply

–7 V to +12 V bus common-mode range

High speed, low power BiCMOS

Thermal shutdown protection

Short-circuit protection

Driver propagation delay: 10 ns typical

Receiver propagation delay: 15 ns typical

High-Z outputs with power off

Superior upgrade for LTC485

APPLICATIONS

Low power RS-485 systems

DTE/DCE interface

Packet switching

Local area networks (LNAs)

Data concentration

Data multiplexers

Integrated services digital network (ISDN)