ADN2807集成電路（IC）的應(yīng)用特定時(shí)鐘/定時(shí)規(guī)格書(shū)PDF中文資料

ADN2807屬于集成電路（IC）的應(yīng)用特定時(shí)鐘/定時(shí)。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的ADN2807應(yīng)用特定時(shí)鐘/定時(shí)專(zhuān)用時(shí)鐘和計(jì)時(shí) IC（集成電路）產(chǎn)品族中的產(chǎn)品主要用于執(zhí)行與時(shí)間或頻率信息生成和分配相關(guān)的各種操作，適合的設(shè)計(jì)環(huán)境較特定，例如 AMD 和 Intel 的中央處理單元 (CPU) 或圖形處理單元 (GPU)、DVD 音頻設(shè)備、藍(lán)光光盤(pán)播放器、以太網(wǎng)設(shè)備、PCIe、SATA、光纖通道接口、車(chē)載娛樂(lè)總線等。

GENERAL DESCRIPTION

The ADN2807 provides the receiver functions of quantization, signal level detect, and clock and data recovery at rates of OC-3, OC-12, and 15/14 FEC. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for –40°C to +85°C ambient temperature, unless otherwise noted.

FEATURES

Meets SONET requirements for jitter transfer/

generation/tolerance

Quantizer sensitivity: 4 mV typical

Adjustable slice level: ±100 mV

Patented clock recovery architecture

Loss-of-signal detect range: 3 mV to 15 mV

Single-reference clock frequency for all rates, including

15/14 (7) wrapper rate

Choice of 19.44 MHz, 38.88 MHz, 77.76 MHz, or

155.52 MHz REFCLK

REFCLK inputs: LVPECL/LVDS/LVCMOS/LVTTL compatible

(LVPECL/LVDS only at 155.52 MHz)

Optional 19.44 MHz on-chip oscillator to be used with

external crystal

Loss-of-lock indicator

Loopback mode for high speed test data

Output squelch and bypass features

Single-supply operation: 3.3 V

Low power: 540 mW typical

7 mm × 7 mm, 48-lead LFCSP

APPLICATIONS

SONET OC-3/-12, SDH STM-1/-4 and, 15/14 FEC rates

WDM transponders

Regenerators/repeaters

Test equipment

Passive optical networks