ADN4612_V01中文資料亞德諾數(shù)據(jù)手冊PDF規(guī)格書

FEATURES

DC to 11.3 Gbps per port, NRZ data rate

Multitime constant, programmable receive equalization

Compensates 25 inches of FR408 at 10.3125 Gbps

Compensates 15 inches of FR408 at 11.3 Gbps

6-tap programmable transmit feedforward equalization (FFE)

Compensates 15 inches of FR408 at 10.3125 Gbps

Compensates 10 inches of FR408 at 11.3 Gbps

Low power

150 mW per channel at 2.5 V (outputs enabled)

12 × 12, fully differential, nonblocking array

Double rank connection programming

2-pin selectable connection maps

Per lane lost of signal (LOS) detection

Flexible output termination supply range (1.8 V to 3.3 V)

DC- or ac-coupled differential CML inputs and outputs

Programmable CML output levels

Load from EEPROM for automatic power-on ready operation

Per lane input and output P/N pair inversion for routing ease

50 Ω on-chip input/output termination

Supports 64-bit/66-bit, scrambled or not coded NRZ data up to 11.3 Gbps

Serial (I2C or SPI slave) control interface

88-lead LFCSP, 12 mm × 12 mm, Pb-free package

?40°C to +85°C operating temperature range

APPLICATIONS

Fiber optic network switching

10 Gigabit Ethernet over backplane 10GBASE-KR 802.3ap

XLAUI/CAUI (802.3ba)

SONET OC-192/STM-64x

1×, 2×, 4×, 8×, and 10× Fibre Channel