ADN4664BRZ集成電路（IC）的驅(qū)動(dòng)器接收器收發(fā)器規(guī)格書PDF中文資料

ADN4664BRZ屬于集成電路（IC）的驅(qū)動(dòng)器接收器收發(fā)器。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的ADN4664BRZ驅(qū)動(dòng)器，接收器，收發(fā)器該系列產(chǎn)品的主要功能是提供必需的硬件資源，以通過延長(zhǎng)電纜或印制線進(jìn)行通信。確切的功能會(huì)因所采用的通信協(xié)議而異，可能包括諸如瞬態(tài)抑制之類的功能，這些功能對(duì)于通信用途可能并非絕對(duì)必要，但對(duì)于可能的使用環(huán)境卻是明智之選。

GENERAL DESCRIPTION

The ADN4664 is a dual, CMOS, low voltage differential signaling (LVDS) line receiver offering data rates of over 400 Mbps (200 MHz) and ultralow power consumption. It features a flow-through pinout for easy PCB layout and separation of input and output signals.

The device accepts low voltage (310 mV typical) differential input signals and converts them to a single-ended 3 V TTL/ CMOS logic level.

The ADN4664 and its companion driver, the ADN4663, offer a new solution to high speed, point-to-point data transmission, and a low power alternative to emitter-coupled logic (ECL) or positive emitter-coupled logic (PECL).

FEATURES

±15 kV ESD protection on output pins

400 Mbps (200 MHz) switching rates

Flow-through pinout simplifies PCB layout

100 ps channel-to-channel skew (typical)

2.5 ns maximum propagation delay

3.3 V power supply

High impedance outputs on power-down

Low power design: typically 3 mW (quiescent)

Interoperable with existing 5 V LVDS drivers

Accepts small swing (310 mV typical) differential signal levels

Supports open, short, and terminated input fail-safe

0 V to ?100 mV threshold region

Conforms to TIA/EIA-644 LVDS standard

Industrial operating temperature range: ?40°C to +85°C

Available in surface-mount (SOIC) package

APPLICATIONS

Point-to-point data transmission

Multidrop buses

Clock distribution networks

Backplane receivers