ADPL44002AUJZ3.3-R7中文資料亞德諾數(shù)據(jù)手冊PDF規(guī)格書

廠商型號	ADPL44002AUJZ3.3-R7
功能描述	40V, 200mA, Low Noise, CMOS LDO Linear Regulator
絲印標識	LXN
封裝外殼	TSOT
文件大小	687.61 Kbytes
頁面數(shù)量	23 頁
生產廠商	Analog Devices
企業(yè)簡稱	AD【亞德諾】
中文名稱	亞德諾半導體技術有限公司官網(wǎng)
原廠標識
數(shù)據(jù)手冊	下載地址一下載地址二到原廠下載
更新時間	2025-3-10 18:03:00
人工找貨	ADPL44002AUJZ3.3-R7價格和庫存，歡迎聯(lián)系客服免費人工找貨

FEATURES

?Low Noise: 20μVRMS Independent of Fixed Output Voltage

?PSRR of 78dB at 10 kHz, VOUT ≤ 5V, VIN = 7V

?Input Voltage Range: 2.7V to 40V

?Maximum Output Current: 200mA

?Initial Accuracy: ±1%

?Accuracy Over Line, Load, and Temperature

?±1.8%, TJ = ?40°C to +125°C

?Low Dropout Voltage: 220mV (typical) at a 200mA Load, VOUT = 5V

?User Programmable Soft Start (LFCSP only)

?Low Quiescent Current, IGND = 80μA (typical) with no Load

?Low Shutdown Current: 1.8μA at VIN = 6V, 3.0μA at VIN = 40V

?Stable with a Small 2.2 μF Ceramic Output Capacitor

?Fixed Output Voltage Options: 1.8V, 2.5V, 3.3V, and 5.0V

?Adjustable Output from 1.2V to VIN – VDO, Output can be Adjusted Above Initial Set Point

?Precision Enable

?2mm × 2mm, 6-Lead LFCSP, 5-Lead TSOT

APPLICATIONS

?Regulation to Noise Sensitive Applications

?ADC, DAC Circuits, Precision Amplifiers, Power for VCO VTUNE Control

?Communications and Infrastructure

?Medical and Healthcare

?Industrial and Instrumentation