ADRF5534中文資料亞德諾數據手冊PDF規(guī)格書

FEATURES

? Integrated RF front end

? LNA and high-power silicon SPDT switch

? On-chip bias and matching

? Single-supply operation

? Gain: 35.5 dB typical at 3.6 GHz

? Gain flatness: 1.5 dB at 25°C across 400 MHz bandwidth

? Low noise figure: 1.3 dB typical at 3.6 GHz

? Low insertion loss: 0.8 dB typical at 3.6 GHz

? High-power handling at TCASE = 105°C

? Full lifetime

? LTE average power (8 dB PAR): 37 dBm

? Single event (<10 sec operation)

? LTE average power (8 dB PAR): 39 dBm

? High Input IP3: ?4 dBm

? Low-supply current

? Receive operation: 120 mA typical at 5 V

? Transmit operation: 15 mA typical at 5 V

? Positive logic control

? 5 mm × 3 mm, 24-lead LFCSP package

APPLICATIONS

? Wireless infrastructure

? TDD massive multiple input and multiple output (MIMO) and

active antenna systems

? TDD-based communication systems