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ADSP-2111BG-80集成電路(IC)的DSP(數(shù)字信號(hào)處理器)規(guī)格書(shū)PDF中文資料
廠商型號(hào) |
ADSP-2111BG-80 |
參數(shù)屬性 | ADSP-2111BG-80 封裝/外殼為100-BCPGA;包裝為管件;類(lèi)別為集成電路(IC)的DSP(數(shù)字信號(hào)處理器);產(chǎn)品描述:IC DSP CONTROLLER 16BIT 100PGA |
功能描述 | ADSP-2100 Family DSP Microcomputers |
文件大小 |
389.75 Kbytes |
頁(yè)面數(shù)量 |
64 頁(yè) |
生產(chǎn)廠商 | Analog Devices |
企業(yè)簡(jiǎn)稱(chēng) |
AD【亞德諾】 |
中文名稱(chēng) | 亞德諾半導(dǎo)體技術(shù)有限公司官網(wǎng) |
原廠標(biāo)識(shí) | |
數(shù)據(jù)手冊(cè) | |
更新時(shí)間 | 2025-1-5 17:34:00 |
ADSP-2111BG-80規(guī)格書(shū)詳情
ADSP-2111BG-80屬于集成電路(IC)的DSP(數(shù)字信號(hào)處理器)。由亞德諾半導(dǎo)體技術(shù)有限公司制造生產(chǎn)的ADSP-2111BG-80DSP(數(shù)字信號(hào)處理器)數(shù)字信號(hào)處理器是類(lèi)似于微處理器或微控制器的器件,但區(qū)別在于其內(nèi)部架構(gòu)經(jīng)修改,適用于對(duì)連續(xù)數(shù)據(jù)流連續(xù)執(zhí)行以乘法和加法運(yùn)算為主的算法,而不是以條件邏輯或大量并發(fā)進(jìn)程為主的算法。該器件通常用于諸如音頻或視頻信號(hào)處理等應(yīng)用。
GENERAL DESCRIPTION
The ADSP-2100 Family processors are single-chip microcomputers optimized for digital signal processing (DSP) and other high speed numeric processing applications. The ADSP-21xx processors are all built upon a common core. Each processor combines the core DSP architecture—computation units, data address generators, and program sequencer—with differentiating features such as on-chip program and data memory RAM, a programmable timer, one or two serial ports, and, on the ADSP-2111, a host interface port.
SUMMARY
16-Bit Fixed-Point DSP Microprocessors with
On-Chip Memory
Enhanced Harvard Architecture for Three-Bus
Performance: Instruction Bus & Dual Data Buses
Independent Computation Units: ALU, Multiplier/
Accumulator, and Shifter
Single-Cycle Instruction Execution & Multifunction
Instructions
On-Chip Program Memory RAM or ROM
& Data Memory RAM
Integrated I/O Peripherals: Serial Ports, Timer,
Host Interface Port (ADSP-2111 Only)
FEATURES
25 MIPS, 40 ns Maximum Instruction Rate
Separate On-Chip Buses for Program and Data Memory
Program Memory Stores Both Instructions and Data
(Three-Bus Performance)
Dual Data Address Generators with Modulo and
Bit-Reverse Addressing
Efficient Program Sequencing with Zero-Overhead
Looping: Single-Cycle Loop Setup
Automatic Booting of On-Chip Program Memory from
Byte-Wide External Memory (e.g., EPROM )
Double-Buffered Serial Ports with Companding Hardware,
Automatic Data Buffering, and Multichannel Operation
ADSP-2111 Host Interface Port Provides Easy Interface
to 68000, 80C51, ADSP-21xx, Etc.
Automatic Booting of ADSP-2111 Program Memory
Through Host Interface Port
Three Edge- or Level-Sensitive Interrupts
Low Power IDLE Instruction
PGA, PLCC, PQFP, and TQFP Packages
MIL-STD-883B Versions Available
ADSP-2101, ADSP-2105, and ADSP-2115 are obsolete
產(chǎn)品屬性
更多- 產(chǎn)品編號(hào):
ADSP-2111BG-80
- 制造商:
Analog Devices Inc.
- 類(lèi)別:
集成電路(IC) > DSP(數(shù)字信號(hào)處理器)
- 系列:
ADSP-21xx
- 包裝:
管件
- 類(lèi)型:
定點(diǎn)
- 接口:
主機(jī)接口,串行端口
- 時(shí)鐘速率:
20MHz
- 非易失性存儲(chǔ)器:
外部
- 片載 RAM:
6kB
- 電壓 - I/O:
5.00V
- 電壓 - 內(nèi)核:
5.00V
- 工作溫度:
-40°C ~ 85°C(TA)
- 安裝類(lèi)型:
通孔
- 封裝/外殼:
100-BCPGA
- 供應(yīng)商器件封裝:
100-PGA(33.53x33.53)
- 描述:
IC DSP CONTROLLER 16BIT 100PGA
供應(yīng)商 | 型號(hào) | 品牌 | 批號(hào) | 封裝 | 庫(kù)存 | 備注 | 價(jià)格 |
---|---|---|---|---|---|---|---|
ADI/亞德諾 |
22+ |
66900 |
原封裝 |
詢(xún)價(jià) | |||
ADI(亞德諾)/LINEAR(凌特) |
20+ |
- |
1800 |
詢(xún)價(jià) | |||
AD |
19+ |
PGA |
2539 |
原廠代理渠道,每一顆芯片都可追溯原廠; |
詢(xún)價(jià) | ||
ADI/亞德諾 |
24+ |
PGA100 |
12320 |
原裝正品 力挺實(shí)單 |
詢(xún)價(jià) | ||
ADI/亞德諾 |
23+ |
N/A |
16800 |
正規(guī)渠道,只有原裝! |
詢(xún)價(jià) | ||
ADI/亞德諾 |
24+ |
PGA100 |
18500 |
授權(quán)代理直銷(xiāo),原廠原裝現(xiàn)貨,假一罰十,特價(jià)銷(xiāo)售 |
詢(xún)價(jià) | ||
ADI/亞德諾 |
22+ |
QFN |
9600 |
原裝現(xiàn)貨,優(yōu)勢(shì)供應(yīng),支持實(shí)單! |
詢(xún)價(jià) | ||
ADI/亞德諾 |
23+ |
PGA100 |
5000 |
一站式BOM配單 |
詢(xún)價(jià) | ||
ADI/亞德諾 |
22+ |
PGA100 |
21000 |
原廠原包裝。假一罰十??砷_(kāi)13%增值稅發(fā)票。 |
詢(xún)價(jià) | ||
Analog Devices Inc. |
23+ |
100-PGA33.53x33.53 |
7300 |
專(zhuān)注配單,只做原裝進(jìn)口現(xiàn)貨 |
詢(xún)價(jià) |