ADSP-216X中文資料亞德諾數(shù)據(jù)手冊PDF規(guī)格書

GENERAL DESCRIPTION

The ADSP-216x Family processors are single-chip microcomputers? optimized? for? digital? signal? processing? (DSP) and other high speed numeric processing applications. The ADSP-216x processors are all built upon a common core with ADSP-2100. Each processor combines the core DSP architecture—computation units, data address generators and program sequencer—with features such as? on-chip program ROM and data memory RAM, a programmable timer and two serial ports. The ADSP-2165/ADSP-2166 also adds program memory and power-down mode.

SUMMARY

16-Bit Fixed-Point DSP Microprocessors with

On-Chip Memory

Enhanced Harvard Architecture for Three-Bus

Performance: Instruction Bus and Dual Data Buses

Independent Computation Units: ALU, Multiplier/

Accumulator and Shifter

Single-Cycle Instruction Execution and Multifunction

Instructions

On-Chip Program Memory ROM and Data Memory RAM

Integrated I/O Peripherals: Serial Ports, Timer

FEATURES

25 MIPS, 40 ns Maximum Instruction Rate (5 V)

Separate On-Chip Buses for Program and Data Memory

Program Memory Stores Both Instructions and Data

(Three-Bus Performance)

Dual Data Address Generators with Modulo and

Bit-Reverse Addressing

Efficient Program Sequencing with Zero-Overhead

Looping: Single-Cycle Loop Setup

Double-Buffered Serial Ports with Companding Hardware,

Automatic Data Buffering and Multichannel Operation

Three Edge- or Level-Sensitive Interrupts

Low Power IDLE Instruction

PLCC and MQFP Packages